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  • 學位論文

針對多核心系統架構之程式特性分析進行取樣模擬

Sampling Simulation through Program Characteristic Analysis for Modern Multicore Architectures

指導教授 : 陳添福 徐慰中

摘要


效能模擬應用在硬體架構的探索在整個硬體設計流程中是一個關鍵的步驟,而且在現代硬體架構快速的發展之下,系統的複雜度與日俱增,模擬一個系統架構所需的時間更是越來越慢。此篇論文提出一個可調試的取樣策略利用程式特性來改善模擬的速度問題,而且考慮到程式執行特性也可進一步改善模擬的精確度。在我們提出的架構中,首先,利用統計理論得出一個合適的取樣參數設定;接著,藉由觀察應用程式的動態行為決定一個可以付出最少代價取得最大效益的取樣調整。此方法除了在應用在多核心架構的CPU模組模擬上,更進一步將取樣模擬的機制建立在GPU的模擬上,解決GPU模擬速度落後更嚴重的問題。

關鍵字

模擬 取樣 圖形處理器 程式特性

並列摘要


Performance evaluation through software simulation to explore hardware architecture tradeoffs is a critical component of the complete design flow. With increasing number of processing units and the growth of complexity of each unit, today’s system has grown rapidly in intricacy. The time needed to simulating these modern systems using software will also grow rapidly and will soon become prohibitively slow. This thesis proposes an adaptive adjustment sampling strategy utilizing program characteristic to accelerate simulation speed. Moreover, the adaptive adjustment strategy presented also improves the simulation accuracy by taking into consideration for program behaviors. In our proposed scheme, we first apply statistical sampling method to find suitable program simulation sampling parameters. We, then, by observing the dynamic behavior of each application collect traces with less overhead to do effective sampling adjustment. We not only utilize this proposed sampling approach for simulating conventional multicore CPU architecture, we also build a prototype of sampling simulation infrastructure for GPU architecture. This is of good value because we believe GPU more than CPU, having more and more threads, will exasperate the issue of simulation performance degradation now and in the future.

並列關鍵字

simulation sampling GPU program characteristic

參考文獻


[4] M. T. Yourst, “PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator,” in IEEE International Symposium on Performance Analysis of Systems Software, 2007. ISPASS 2007, pp. 23–34, April 2007.
[8] J. H. Ding, P. C. Chang, W. C. Hsu, and Y. C. Chung, ” PQEMU: A Parallel System Emulator Based on QEMU,” in 2011 IEEE 17th International Conference on Parallel and Distributed Systems. ICPADS 2011, pp. 276-283, Dec. 2011.
[13] R. E. Wunderlich, T. F. Wenisch, B. Falsafi, and J. C. Hoe, “SMARTS: accelerating microarchitecture simulation via rigorous statistical sampling,” in SIGARCH Comput. Archit. News, vol. 31, no. 2, pp. 84–97, May 2003.
[14] T. F. Wenisch, R. E. Wunderlich, M. Ferdman, A. Ailamaki, B. Falsafi, and J. C. Hoe, “SimFlex: Statistical Sampling of Computer System Simulation,” in IEEE Micro, vol. 26, no. 4, pp. 18-31, July 2006.
[16] T. Sherwood, E. Perelman, G. Hamerly, and B. Calder, “Automatically characterizing large scale program behavior,” in SIGARCH Comput. Archit. News, vol. 30, no. 5, pp. 45–57, Dec. 2002.

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