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  • 學位論文

探索交叉奈米線元件的奈米接點與邏輯特性

Nanocontact and Logic Properties of Crossed Nanowire Device

指導教授 : 簡紋濱

摘要


隨著奈米線上下交錯排列技術的發展,探討小面積的接面問題與元件電性是相當重要的,本實驗中我們利用氧化鋅錫(Zn2SnO4)與金奈米線交疊的方式來組成元件,將元件簡稱為交叉奈米線元件,分別探討元件中氧化鋅錫奈米線與蕭特基接觸的電性差異,以及外加閘極電壓對元件電性的影響。 實驗主要分成兩部分來探討,第一部分是比較氧化鋅錫奈米線與蕭特基接觸的電性,兩者的電流-電壓特性有明顯的不同,其中本質之電流-電壓曲線呈現對稱性與線性,而蕭特基接觸之電流-電壓曲線呈現非對稱性與具有整流性,在零電壓附近有高電阻性質,再利用探針系統變溫量測,進一步分析兩者不同傳輸機制,分別由變程跳躍與熱離子放射理論來分析,氧化鋅錫奈米線的電性傳輸是由三維變程跳躍所主導,不符合熱離子放射理論,而蕭特基接觸之電性在高溫時符合熱離子放射理論,且觀察到蕭特基效應所造成的位障降低,並可得出位障高度與施體摻雜濃度,則在低溫時電性傳輸是由穿隧電流所主導。 第二部分是探討外加閘極電壓對元件電性的影響,我們分別對上與背電極外加電壓來量測元件電性反應,比較兩者的電晶體特性,發現上閘極效應之反應效果比較好,另一有趣的是,我們上下同時調變不同閘極電壓大小,可將元件開發成邏輯元件中的三態緩衝器,期望未來能將元件應用在邏輯電路上。

並列摘要


The technique to assemble nanowire into device structures is vita so is the investigation of electrical properties of crossed-nanowire junction. Zn2SnO4 (ZTO) nanowire and Au nanowire are chosen to realize crossed nanowire devices. In the beginning, the electrical property of the intrinsic ZTO nanowire and that of the nano-Schottky contact between ZTO and Au nanowires are explored. The I-V curve of ZTO nanowire showed symmetrical and linear behavior which could be ascribed to Ohmic contact between the ZTO nanowire and metal electrodes. The R-T behavior of the intrinsic nanowire property can be well described by three-dimensional Mott’s variable range hopping. The electrical property of the nano-Schottky contact is different from that of the intrinsic ZTO nanowire property. The I-V curve of the nano-Schottky contact junction reveals asymmetrical and rectifying manners. By measuring the R-T data, the transport mechanism of nano-Schottky contact is decided to follow the thermionic emission theory. In addition, in the low temperature regime, an excess current tunneling through the crossed-nanowire junction is detected. It implies the significant feature of the nano-Schottky contact. The barrier height of the crossed-nanowire junction and the carrier concentration of ZTO nanowire are evaluated. The crossed-nanowire junction devices are used to demonstrate the top-gated field-effect transistor. Suppression of current flow can be achieved by applying voltage on both top- and back-gate electrodes. It is discovered that the channel controlling ability via the top-gate electrode is much better than that by the back-gate voltage. More interestingly, the conductance of channel can be simultaneously modulated by top- and back-gate voltage to demonstrate the operation of a tri-state buffer.

參考文獻


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