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  • 學位論文

碳化矽金氧半場效電晶體通道遷移率劣化機制之研究

A Study on the 4H-SiC MOSFETs Channel Mobility Degradation Mechanism

指導教授 : 崔秉鉞

摘要


碳化矽因為具有寬能隙以及高熱傳導係數,適合用來製作高功率元件。但是因為高介面能態密度所造成的庫倫散射而使的碳化矽金氧半場效電晶體(MOSFET)有很低的通道遷移率。也因此,若想要提升通道遷移率,就必須降低介面能態密度。本論文分為兩部分,第一部分以金氧半電容結構研究降低介面能態密度的低溫製程;第二部分以金氧半場效電晶體探討載子遷移率劣化機制。 我們嘗試利用低熱預算製程方法來減少介面能態密度。方法是直接層積二氧化矽來當電容的閘極介電質,或是在較低溫度下(1100 oC)使用一氧化二氮氣體氧化作為氧化層,但是這些改善方法卻沒有顯著的成果,不如2012年本實驗室利用氨氣電漿處理有效。在使用此方法於金氧半場效電晶體之前,我們檢驗藉由氫氣來鈍化的介面是否有良好的熱穩定性。結果顯示,儘管氨氣電漿處理能夠降低介面能態密度,但是只要後續的退火溫度高於500 oC,鈍化的能態介面就無法承受。也因此使用氨氣電漿應當避免後續的高溫製程,也就是電漿處理必須在閘極製作完成之後實施。 我們做完閘極後再用氨氣電漿處理,確認只要氨氣電漿的時間夠長,對於此結構就有能力修補介面能態密度,也因此我們可以用此方法在金氧半場效電晶體的製程上。 製作金氧半場效電晶體,我們採用了FH-6400以及S-1813兩種不同型號的光阻燒結形成碳膜以在後續高溫退火製程中保護碳化矽表面。結果顯示,藉由FH-6400所形成的碳膜有較厚的碳膜厚度而有更好的保護效果,也因此去掉碳膜後有較平整的表面粗糙度,因此採用FH-6400所製作出來的試片有較好的通道遷移率。然而我們所製作出來的金氧半場效電晶體的通道遷移率非常的低,就算使用的氨氣電漿仍然僅些微改善,扣除源極/汲極串連阻抗後,載子遷移率幾乎不變。因此了解碳化矽通道遷移率劣化之機制,成為了本論文探討的另一重點。 為了降低表面粗糙度,我們製作了試片在成長閘極氧化層之前略蝕刻碳化矽的表面,然而這些試片長完氧化層後,表面粗糙度卻變得很差,而造成非常低的載子遷移率。猜測原因是p型井區離子植入產生晶格缺陷,電漿蝕刻製程快速蝕刻缺陷區域,被蝕刻區域則因為呈現不同的晶面,因此氧化速率不同。氨氣電漿處理可以改善表面能態的缺陷,因而有較好的通道遷移率,臨界電壓也降低,並且有次臨界擺幅也有改善。 欲了解載子遷移率劣化的原因,我們對金氧半場效電晶體進行變溫量測。結果顯示了隨著溫度升高,載子遷移率將會提升,可見庫倫散射機制主導通道遷移率。經過電漿蝕刻的試片,則因為表面太過粗造,載子遷移率的溫度關係不明顯,主要散射機制是表面散射。我們也在基極加不同偏壓來探討基極效應。結果顯示載子遷移率將會隨著更負的基極偏壓而降低。那是因為更負的基極偏壓會有更強的垂直電場,而造成電子有更多的機會受到表面粗糙度以及庫倫散射而使遷移率降低。 這是我們實驗室第一次製作碳化矽金氧半場效電晶體,雖然我們研究成果有待改進,但是藉由研究結果,我們瞭解了哪些機制使得載子遷移率劣化。藉由解決這些使載子遷移率劣化的機制,希望未來我們實驗室可以作出更好特性的碳化矽金氧半場效電晶體。

並列摘要


Silicon carbide (SiC) is suitable for fabricating high power semiconductor devices because of its wide bandgap and high thermal conductivity. Unfortunately, low channel mobility occurs on the 4H-SiC MOSFETs due to the high SiO2/SiC interface state density (Dit) which leads to coulomb scattering. Therefore, if we want to enhance channel mobility, we must reduce Dit at first. This thesis is divided into two parts. The first part is using low thermal budget method to reduce the Dit of MOS capacitors. The second part is the study on the 4H-SiC MOSFETs channel mobility degradation mechanism. We tried some low thermal budget methods to reduce Dit, such as depositing a PE-oxide and N2O oxidation at 1100 ℃ as gate dielectric. But these methods didn’t reduce Dit as effective as our group used ammonia plasma treatment in 2012. Before executing this method in MOSFETs fabrication processes. We should examine the thermal stability of the hydrogen passivation effect after additional high temperature processes. Although ammonia plasma treatment can reduce the Dit, but the passivated interface can’t sustain processes with temperatures higher than 500 C. Therefore, NH3 plasma treatment after device fabrication should be evaluated. That is NH3 plasma treatment should be post-gate-pattering. We fabricated the MOS capacitor by NH3 plasma treatment post-gate-pattering. Fortunately, the post-gate-patterning NH3 plasma treatment does reduce Dit for the enough time of ammonia plasma treatment. Hence we could use this method in the MOSFETs fabrication process. For the process of fabrication MOSFETs, we coated different kinds of photo resistors to form graphite capping layer. They are FH-6400 and S-1813, respectively. Samples using FH-6400 show better surface roughness than S-1813. This is because the graphite capping layer formed by coating FH-6400 is thicker than S-1813 which leads to better protective effect. Therefore, sample has higher channel mobility with the smoother surface roughness. However, our samples have very low channel mobility and only slightly improvement channel mobility even if samples were exposed ammonia treatment. Despite of we excluding RSD series resistance method. Therefore, to investigate the reason of leading mobility degradation is studied in this thesis. To reduce surface roughness, we fabricated the MOSFETs with slightly chemical etching SiC surface before growing gate dielectric. However the surface morphology becomes worse after gate oxidation process. The higher surface roughness of samples leads to worse channel mobility. This result might be the lattice defect caused by p-well implantation. The defect region is etched with higher rapid which leads to different orientation. Therefore the oxidation rate is difference which leads to highly surface roughness. Ammonia plasma treatment can passivate the interface defects so that the threshold voltage is reduced and the subthreshold swing is improved. To further investigate the degradation of the channel mobility, high temperature measurement was executed. The result shows that the channel mobility will enhance with higher temperature. This is because the mobility is dominated by the coulomb scattering mobility, which has positive temperature dependence. Mobility of samples after etching process don’t increase with higher temperature obviously. This is because the surface roughness scattering which dominates the mobility mechanism. Body effect was also measured by giving various body voltages. The result shows the channel mobility will decrease with the more negative VBs bias. As VBS becomes more negative, a stronger vertical electric field would exert on the electrons in the inverted channel. Hence, electrons will suffer stronger surface scattering and coulomb scattering which lead to mobility degradation. This is the first time for our group to fabricate 4H-SiC MOSFETs. Although the electrical properties of our samples are needed to be improved in the future, but from the study of mobility degradation mechanism, we realized the reasons of our MOSFETs channel mobility degradation. We expect better performance of our 4H-SiC MOSFETs by solving these problems in the future.

參考文獻


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