氟掺雜濃度對於二氧化鉿堆疊式閘極P型金氧半場效電晶體其可靠性的影響

Effect of Fluorine dosage on the Reliability Issue of pMOSFETs with HfO2/SiON Gate Stack

謝岳展(Hsieh, Y.C.)

指導教授 ： 羅正忠 ； 邱碧秀

國立交通大學/電機學院/微電子奈米科技產業專班/碩士(2008年)

https://doi.org/10.6842/NCTU.2008.00052

摘要

根據半導體積體電路的微縮定理,極薄的二氧化矽介電質層(1至1.5奈米)將遭遇量子穿遂效應的問題而導致極大的洩電流,導致元件可靠度上的問題。近年來使用高介電質材料來取代傳統以二氧化矽當介電質層已廣泛被研究。相較於二氧化矽,由於在相同的等效厚度之下高介電質物質有較厚的實際厚度,因此可以抵擋因量子的穿遂效應而導致的大量漏電。然後,以高介電質材料當閘極介電質層卻遭遇到其它的問題。例如:相對於二氧化矽操作在相同電壓下,高介電質材料有較高的界面狀態產生及較多的電荷捕捉,這對於元件操作時臨限電壓的漂移有較嚴重的影響。
在P型金氧半場效電晶體中,負偏壓溫度不穩定效應是主要的問題。我們於閘極介電質沈積前,以離子佈值的方式植入氟摻雜,使氟原子在後續的高溫摻雜活化的過程中,使其擴散至通道和閘極介電質層。利用氟的摻入,我們深入的探討氟對二氧化鉿/氮氧化矽閘極之P型金氧半場效電晶體對於負偏壓溫度不穩定效應的影響。我們發現,摻雜氟對於元件的基本特性,有顯著的改善。對於固定電壓應力(CVS)量測時,含氟摻雜的元件有較低的界面狀態產生,和較少的電荷捕捉,對於元件的可靠度和穩定性有明顯的改善,因此改善了以高介電質材料為閘極介電極層的穩定性和可靠性。我們也發現以本論文的實驗結果而論是1E14的氟濃度摻雜是最好改善Hf-based dielectric缺陷的製程條件。

關鍵字

氟掺雜 ； 二氧化鉿

並列摘要

According scaling rule, ultra-thin oxide(about 1~1.5nm) will undergo tunneling effect and then cause gate leakage current , which is the issue of the reliability . Recently , high dielectric constant materials are used to replace SiO2 has widely studied. Compare with SiO2 at the same equivalent oxide thickness (EOT) , high dielectric constant materials have thicker physical thickness which can resist tunneling effect , and then avoid leakage current . However , using high dielectric constant materials as gate dielectric experience other problems . For example , high dielectric constant materials have higher interfacial states and charge traps , these will cause more serious threshold voltage shift when working device as the same voltage compare with SiO2 .In pMOSFETs , negative bias temperature instability is the main issue . We incorporate F before gate dielectric deposition via channel implantation technique, which was subsequently diffused into the gate stack during annealing process . By fluorine incorporation , we discuss the effects of negative bias temperature instability (NBTI) of F incorporated in pMOSFETs with HfO2/SiON stack in depth . We found that F incorporated improves the fundamental electrical properties of the fabricated transistors . In addition , under constant voltage stress (CVS) , we found that lower generation rate of interface states and charge trapping are observed for device with F incorporation , thus enhances the reliability and the stability of high-k devices. We also found that at 1E14 fluorine dosage has maximum improvement to Hf-based dielectric in turns of this thesis.

並列關鍵字

Fluorine dosage ； HfO2

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