以深度雙Q類神經網路結合Calculix有限元素分析軟體搜尋印刷電路板最小變位差之組裝

Application of Double Deep Q Neural Networks and Calculix FEM System for Searching the Least Displacement in Printed Circuit Board Assemblies

曾曉彤(Xiao-Tong Zeng)

指導教授 ： 洪士林 ； 蘇威智

國立交通大學/工學院/土木工程系所/碩士(2020年)

摘要

印刷電路板係藉由表面黏貼技術將晶片安裝至印刷電路板上，然因表面黏貼流程中晶片與印刷電路板之熱膨脹係數不同且會歷經高溫(185°C)降溫冷卻160°C到低溫(25°C)的過程而產生殘留應力且造成翹曲變形，其變形大小受晶片與印刷電路板之材料力學參數、幾何參數與溫差影響。本研究將在單一材料力學參數和溫差下探討幾何參數中之晶片個數、尺寸和位置對上述變形的影響，並藉由訓練深度雙Q網路(Double Deep Q Network, Double DQN)與結合有限元素分析軟體Calculix，以探討晶片安裝在印刷電路板不同位置上因上述溫差效應產生之最小變位差。研究中將設置八組不同單晶片尺寸與七組不同尺寸雙晶片分別安裝至印刷電路板，而後將每組晶片隨機安裝在100個不同的印刷電路板位置並求得100個變位差。將其中最小變位差、最小3個變位差平均和整體平均變位差分別定義為評估等級一、等級二和等級三。接著，以Double DQN搜尋晶片如何從初始座標移動到最小變位差之終止座標。研究證實在單晶片情況下以隨機選取五個初始座標的方式，皆成功找出達到等級一的變位差；而雙晶片情況下依照單晶片結果得知此印刷電路板組裝最佳兩個初始座標，以此座標作為雙晶片初始座標，可搜索出達到等級二的變位差。

關鍵字

深度雙Q類神經網路 ； Calculix有限元素分析軟體 ； 印刷電路板組裝 ； 溫差變形 ； 最小變位差

並列摘要

The printed circuit boards (PCBs) uses surface mount technology to post the chips on them. However, due to the different thermal expansion coefficients of the chips and the PCBs, PCBs will cause warpage deformation, as they will undergo a cooling process from 185°C to 25°C and generate residual stress. The deformation is affected by the material mechanics, thermal and geometric sizes parameters of chips and PCBs. This study will explore the influence of the number, size, and position of the chips on the deformation under fixed mechanics and thermal parameters. Herein, the FEM software Calculix is utilized to explore the minimum deformation difference caused by the above-mentioned thermal effect caused when the chip is installed at different positions on the PCB and the Double Deep Q Networks (Double DQN) is employed to search the least deformation of PCBs. Eight groups of different sizes single-chip and seven groups of different sizes double-chip were installed on the printed circuit board, and then each group of chips was randomly installed on 100 different positions of PCB and 100 corresponding deformations were obtained. Among them, the least, the averages of smaller 3 deformations, and the overall average deformations are defined as evaluation levels one, two, and three, respectively. Then, the Double DQN is employed to search the least (global) deformation from a random initial position. Research results revealed that in the case of single-chip for five randomly selected initial positions, the Double DQN can successfully search level one deformations for each case; and in the case of dual-chip, the Double DQN can also successfully find level two deformation, starting from the two best initial positions of the case of single-chip.

並列關鍵字

Double Deep Q Neural Network ； Calculix Finite Element Analysis Software ； Printed Circuit Board Assembly ； Deformation of Thermal Effect ； the Least Deformation

參考文獻

[1] 經濟部技術處，「產業技術基磐研究與知識服務計畫」，2014。

[2] Publishing House of Electronics Industry,“Electronic Assembly Technology of System Equipment”, 2017.

[3] R.L. Beadles,“Integrated Silicon Device Technology”,ASD-IRD-63-316,Research Triangle Institute, 1967, May.

[4] Shu-Juan Guo, Zhi-Hong Jin,”Optimization on Component Allocation between Placement Machines in Surface Mount Technology Assembly Line”, 2009.

[5] Hai Ding et al.“Parametric Study of Warpage in Printed Wiring Board Assemblies”,IEEE Transactions on Components and Packaging Technologies, VOL.28, NO.3, 2005.