適用於異質多核心處理器之串流媒體應用的輕量級任務控制器

近年來，許多嵌入式系統紛紛使用異質多核心處理器，像是TI OMAP 以及 IBM Cell BE，將大量運算的工作由微處理器分配給數位訊號處理器來滿足串流媒體應用的高效能需求，這些應用包含聲音與影像的編解碼，甚至無線網路的服務等等。然而，當串流媒體應用的複雜度越來越高時，在異質多核心上的工作管理就越費力，包含工作排程、工作指派、同步處理以及記憶體分配。在論文所提出的智慧型串流控制器，可利用串流媒體應用的串流特性來動態管理工作，並指派給在異質多核心上可用的處理器。同時也提供一組簡單且高抽象化的應用程式介面來描述在異質多核心處理器上的平行程式。在我們的模擬結果裡，所提出的智慧型串流控制器比起用軟體的方式實現，在管理工作上可達到10倍左右的加速效果。同時與一顆微處理器相比，也只需花費 3.72% 的邏輯閘數量。此外，我們所提出的智慧型串流控制器可減少1~2顆數位訊號處理器，便可滿足MP3 decoder, GSM speech encoder 以及 MPEG4 decoder的效能需求。

關鍵字

多核心排程

並列摘要

Recently, many embedded systems adopt the heterogeneous multicore processors, such as the TI OMAP and the IBM Cell BE to allow offloading computation-intensive tasks from the MPU to the numerous DSP cores for satisfying the increasing performance requirement of emerging media-streaming applications, such as audio codec, video codec and even wireless services. However, as the complexity of media-streaming applications grows, the task management on heterogeneous multicore becomes laborious including task scheduling, task dispatching, synchronization and memory allocation. The proposed smart stream controller (SSC) leveraging the streaming characteristics of media-streaming applications to dynamically schedule ready-to-run tasks onto the available worker cores on the heterogeneous multicore processor. The smart stream controller provides a set of simple and high-level APIs to facilitate parallel programming on the heterogeneous multi-core processors. In our simulation results, the proposed smart stream controller achieves about 10x speeds up of task management compared to its software counterpart (i.e. implementing the SSC functions on MPU) and costs only 3.72% gate count compared to a RISC core. Moreover, One to two DSP cores can be reduced to achieve the performance requirements of MP3 decoder, GSM speech encoder and MPEG4 decoder due to the novel scheduling approach of proposed SSC.

並列關鍵字

multicore scheduling

參考文獻

[2] Y. Etsion, et al., “ Task superscalar: An out-of-order task pipeline,” in Int. Symp. on Microarchitectures, 2010, pp. 89-100, 2010.

[3] C. meenderinck and B. Juurlink, “ A case for hardware task management support for the StarSs programming model,” in Proc. EUROMICRO Conf. on Digital System Design: Architectures, Methods and Tools (DSD), pp.347-354, 2010.

[5] M. Sjalander, A. Terechko, and M. Duranton, “ A look-ahead task management unit for embedded multi-core architectures,“in Proc. EUROMICRO Conf. on Digital System Design: Architectures, Methods and Tools (DSD), pp.149-157, 2008

[8] ARM. Available: http://www.arm.com/index.php

[9] E. A. Lee and T. M. Pards, “Dataflow process networks,” in Proc. IEEE, vol. 83, 1995.

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適用於異質多核心處理器之串流媒體應用的輕量級任務控制器

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