應用於BCH與LDPC串接編碼系統的BCH碼選擇方法以及其疊代解碼演算法

BCH Code Selection and Iterative Decoding for BCH and LDPC Concatenated Coding System

陳品翰

指導教授 ： 陳伯寧

國立交通大學/電機學院/電信工程系所/碩士(2012年)

https://doi.org/10.6842/NCTU.2012.00613

摘要

對於兩碼串連的串接系統而言，消除由內碼解碼器所殘餘的錯誤是外碼最主要的設計目的。為了有效地消除那些殘餘的錯誤，必須基於內碼解碼器的的行為來選擇適當的外碼。在這篇碩士論文中，我們考慮一個可適用於快閃記憶體的商業標準，也就是系統化(Systematic)的BCH碼與正規類循環低密度位元檢測碼(QC-LDPC)的串接系統。我們提出一個根據內部的低密度位元檢測碼解碼器產生的錯誤模式選擇BCH碼的方法，使得在輕微的碼率損失下，可有效降低LDPC碼的錯誤遲滯現象。除此之外，對於使用代數解碼演算法的外碼解碼器，我們提出了一個基於反饋的疊代解碼演算法以改善解碼錯誤率。模擬結果顯示我們所提出的反饋疊代解碼只有些微地增加解碼複雜度，卻可以有效地改善系統錯誤率。

關鍵字

BCH 碼 ； 低密度位元檢測碼 ； 串接系統 ； 疊代解碼

並列摘要

For a serial concatenated coding system, the outer code is mainly designed to remove the residual errors induced by the inner decoder. In order to efficiently eliminate these residual errors, the selection of outer codes should depend on the error behavior of the inner decoder. In this thesis, we consider the concatenated systematic BCH and QC-LDPC coding system, which may be suitable for commercial standards of flash memories. We first propose a selection method of BCH codes according to the error patterns that are produced by the inner LDPC code decoder so as to lower the error floor but retain minor rate loss. Moreover, for the algebraic outer decoder, we present a feedback-based iterative decoding algorithm to improve the decoding performance. Simulations show that our feedback iterative decoding can effectively improve the system performance with only a slight increase in decoding complexity.

並列關鍵字

BCH code ； LDPC code ； Concatenated system ； Iterative Decoding

參考文獻

[1] F. Sun, K. Rose, and T. Zhang, ``On the use of strong BCH codes for improving multilevel NAND flash memory storage capacity'', in Proc. IEEE Workshop on SiPS, Banff, Canada, October 2006.

[2] W. Liu, J. Rho, and W. Sung, ``Low-power high-throughput BCH error correction VLSI design for multi-level cell NAND flash memories'', in Proc. IEEE Workshop on SiPS, Banff, Canada, October 2006, pp. 303-308.

[4] S. Lin and D. J. Costello, Error Control Coding, 2nd ed., New Jersey:Prentice Hall, 2004.

[5] L. Lan, L. Zeng, Y. Y. Tai, L. Chen, S. Lin, and K. Abdel-Ghaffar, ``Construction of quasi-cyclic LDPC codes for AWGN and binary erasure channels: A finite field approach'', IEEE Trans. Inform. Theory, vol. 53, no. 7, pp. 2429-2458, July 2007.

[6] L. Chen, L. Zeng, S. Lin, and W. H. Fong, ``Efficient encoding of quasi-cyclic low-density parity-check codes'', IEEE Trans. Commun., vol. 54, no. 1, pp. 71-81, January 2006.