降低金屬與N型鍺接觸電阻之研究

A Study on the Contact Resistance Reduction in Metal/n-type Germanium Contacts

高銘鴻(Ming-Hong Kao)

指導教授 ： 崔秉鉞

國立交通大學/電機學院/電子工程系所/碩士(2012年)

https://doi.org/10.6842/NCTU.2012.00809

摘要

隨著製程技術的發展，使用矽做為主要半導體材料的金氧半場效電晶體不斷地成功微縮，但是如果繼續發展下去很快的會碰到了物理極限的限制而導致無法繼續提升性能。許多方式被提出來解決這個問題，鍺由於其較高的載子遷移率以及與矽製程較大的相容性，被視為是下個世代中有機會取代矽做為通道的半導體材料。但是N型鍺與金屬接面會有較大的蕭基位能障而導致較大的接觸阻抗，所以如果我們要使用鍺做為金氧半場效電晶體的材料，降低N型鍺與金屬接觸阻抗是必要的。本論文探討兩種不同的方式來降低N型鍺與金屬的接觸阻抗，分別是以調變蕭基位能障的介電層插入元件與增加接面載子濃度的修正蕭基位障元件。
　　介電層插入製程已有文獻發表，前人研究使用三氧化二鋁以及二氧化鈦做為介電層，由於二氧化鈦與鍺有較低的導帶差，因而在降低蕭基位能障之外還能達到較小的穿隧阻抗，以致於有較大的導通電流，但是實際改善機制尚無定論。本論文首先觀察到蕭基位能障鎖定效應在不同厚度的二氧化鈦介電層插入元件上並沒有太大差異，所以推斷介電層插入元件是以改變鎖定位置為主的方式調變蕭基位能障。再利用金氧半電容結構計算出介電層內部的固定電荷量並不足以造成如此大的調變幅度，所以推論其調變方式是主要以接面因不同極性而產生的感應偶極電荷為主。除此之外，我們發現介電層插入元件在攝氏300度經30分鐘的退火條件下，特性就會變差且蕭基位能障會回升，退火溫度愈高，蕭基位能障愈高。根據微結構分析，我們推論介電層因退火而產生的結晶化是導致特性變差的主要原因，由於介電常數因結晶化而增加，介電層電容值增加所以電壓改變量較小，導致蕭基位能障增加。較厚的二氧化鈦介電層會有較低的電容值，可能也是其蕭基位能障較低的原因。
　　修正蕭基位障元件因為離子植入在金屬鍺化物而不是直接植入鍺基板，鍺基板中產生的缺陷較少，所以之後退火時雜質就不會因為與缺陷的反應而提升雜質擴散速率，進而在金屬與半導體的接面產生較淺且載子濃度較高的摻雜層。研究發現提升活化溫度能得到更高的載子活化濃度，但是鎳化鍺的熱穩定性不佳，限制了活化溫度在攝氏500度。為了增進鎳化鍺的熱穩定性，本論文提出在鎳與鍺中間插入一層矽再讓其反應的技術，研究發現加入矽之後，鎳化鍺的熱穩定性從500度提升到了550度，且具有較低的片電阻值。藉由使用摻雜矽的鎳化鍺來製做修正蕭基位障元件，將活化溫度提升到550度，得到了更高的活化濃度。與傳統直接植入鍺基板再退火的元件相比，修正蕭基位障元件具有較佳的活化濃度與較淺的高濃度區域，因此修正蕭基位障接面具有當做短通道鍺基板金氧半場效電晶體的源極與汲極的潛力。
　　本論文提出插入介電層以降低蕭基位能障高度的物理機制，並解釋了厚度與退火溫度的效應，並提出新的修正蕭基位障技術，以降低接觸電阻，並得到高濃度的淺接面，對於提升N型鍺的金氧半場效電晶體，極具應用潛力。

關鍵字

鍺基板 ； 接觸阻抗 ； 蕭基位能障 ； 介電層插入技術 ； 蕭基位能障調變技術

並列摘要

With the rapid progress of nano-fabrication technology, Si based MOSFETs have been successfully scaled down to 20 nm regime. However, the continued scaling will be a problem due to several physical and technical limitations, and the device performance may not be improved by further scaling down. Many methods have been purposed to solve this problem, because of the higher carrier mobilities and better process compatibility, Ge is considered a potential candidate to replace silicon as the next generation channel material. However, the contact resistance between metal and n-type Ge is very high due to the high Schottky barrier height. To implement high performance Ge NMOSFETs, reducing the contact resistance of metal/n-type Ge is critical.
In this thesis, two different methods to reduce the contact resistance of metal/n-type Ge are investigated. One is inserted dielectric-inserted junction and the other is modified Schottky barrier junction. The former is to modulate the Schottky barrier height and the latter is to enhance the doping concentration at the metal/Ge interface.
The dielectric insertion method has been reported in literature. Both Al2O3 and TiO2 have been used as the inserted dielectric layer. Because of the lower conduction band offset of TiO2 to Ge, it can not only reduce the Schottky barrier height but also achieve low tunneling resistance and high conduction current. However, the mechanism has not been well understood. In this thesis, we first observed that the Fermi level pinning effect is a very weak function of the TiO2 thickness so we infer that the Schottky barrier height reduction by the dielectric insertion is due to the change of the pinning position. The amount of fixed charges in the thin dielectric layer is extracted from a MIS structure and it is found that the small amount of fixed charges is not sufficient to produce such a pronounced voltage drop to modulate the Schottky barrier height. It is thus recommended that the mechanism of the dielectric insertion method mainly comes from interface dipoles. Besides, it is observed that after annealing at 300 °C for 30 minutes, the Schottky barrier height will increase. The increase of the Schottky barrier height increase with the increasing of the annealing temperature. According to the microstructural analysis, it is postulated that the crystallization of the dielectric layer after annealing is the main reason for the increase of Schottky barrier height. Due to the dielectric constant increase after crystallization, the capacitance of the dielectric capacitor increases and causes smaller voltage drop so that the Schottky barrier height increases. The thicker TiO2 dielectric layer has smaller capacitance, which might be the reason for the lower Schottky barrier height.
In the modified Schottky barrier method, dopants are implanted into metal-germanide instead of Ge so that the number of defects formed in substrate could be negligible, which would mitigate the dopants diffusion caused by the interaction between defects and dopants. A thin and high doping concentration layer can be formed at the metal/semiconductor interface. Increasing the activation temperature will achieve higher doping concentration. But the allowed annealing temperature is limited by the poor thermal stability of NiGe films. To improve the thermal stability of NiGe films, a Si layer is inserted between Ni and Ge before annealing. The result shows that the thermal stability of NiGe film is improved by this Si-insertion layer from 500 °C to 550 °C. Using the Si-insertion technique, the activation temperature of MSB junctions can be raised to 550 °C so that the doping concentration is enhanced. Compared to the conventional junction with direct implantation into Ge, the junction depth is much shallower and the carrier concentration is much higher for the MSB junction which suggests that the MSB process is attractive for the short channel Ge MOSFETs.
In summary, this thesis proposed the mechanism of the Schottky barrier height modulation by dielectric insertion. The thickness effect and annealing effect are also explained. A new method, modified Schottky barrier method, is propsed to reduce the contact resistance between metal and n-type Ge by forming a thin and high concentration layer at the metal/Ge interface. This method is very promising for short channel Ge NMOSFET.

並列關鍵字

Germanium ； Contact resistance ； Schottky barrier ； Dielectric insertion process ； Modified Schottky barreir process

參考文獻

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