不同金屬墊層在低錫銀銲錫厚度下的電遷移破壞模式分析

The electromigration failure mode of low-bump-height Sn2.3Ag solder with different under-bump-metallizations

吳俊毅

指導教授 ： 陳智

國立交通大學/工學院/材料科學與工程系所/碩士(2012年)

https://doi.org/10.6842/NCTU.2012.00901

摘要

隨著電子元件輕、薄、短、小化的趨勢，電子封裝技術需要達到更多性質上的提升以滿足這樣的趨勢，例如：銲錫接點體積的縮小、良好的電性表現以及高I/O密度傳輸。這些特性上的需求使得銲錫接點縮小到10～20微米，這樣的尺寸下使得部分問題顯得漸趨嚴重。首先，電流密度隨著銲錫接點的微小化產生大幅度的上升。第二，焦耳熱效應會更趨顯著，當電流密度跟溫度梯度達到一個臨界值，電遷移及熱遷移現象就會發生，這些現象對元件可靠度的影響會是個非常嚴重的議題。
本研究中，利用三種不同的金屬墊層結構，分別為銅銅墊層、鎳銅墊層以及鎳鎳墊層於錫銀銲錫接點下做電遷移測試分析，三種結構的上端皆有50微米的銅柱，根據文獻報導，銅柱結構有助於電流分散以及抵抗電遷移的功能，因此能降低電流集中效應。在量測上，利用凱文結構來觀測銲錫接點在電遷移下電阻變化情形，在阻值達到1.1、1.2、1.5倍時分別做微結構觀測。測試條件分別在150 oC 的加熱盤上施以1.6安培，不同金屬墊層所造成的破壞機制將各別被討論，我們發現孔洞生成在介金屬化合物與金屬墊層之間。此外，銲錫接點內部因焦耳熱效應造成的溫升，也將藉由試片內所架設的銅導線電阻係數來量測內部實際溫度，此一方式提供了一個較為準確的溫度提供後續的結果分析。

關鍵字

電遷移 ； 低銲錫厚度

並列摘要

With the trend of miniaturization, the electronic device becomes smaller and smaller. In addition, the electronic device require some more features, such as small volume of solder bump, better electrical performance and higher I/O density. With all these demands, the size of solder bump shrinkage into micro scale inevitably. Microbumps have been adopted for interconnects in 3D IC packaging. The bump height decreases to about 10-20 μm. Due to the small volume of the solder, some problems may occur. First, the current density inside the bump increased rapidly due to the reduced cross section area. Second, the joule heating effects occur severely. Once the current density and temperature gradient reach a critical value, electromigration and thermomigration effects occur and endanger the microbumps. Therefore, the electromigration performance of the micro-bump becomes a critical issue.
In this study, three different under-bump-metallizations (UBMs) are used, which are Cu-Cu, Ni-Cu and Ni-Ni UBMs with the Sn2.3Ag solder between. There is a copper column on the chip side with 50μm height. It had been reported that copper column had a better performance in resisting the electron wind force and it can also make the current flow uniformly. Electromigration tests were performed at a current density of 2 x 104 A/cm2 at 150 oC. The bump resistance was measured by using Kelvin structure, and defined the bump resistance to increase 10%, 20%, 50% of its initial bump resistance as failure stages. We found that Voids formed in the interface of under-bump-metallization and intermetallic compounds. Besides, the joule heating of the solder joints during electromigration tests was measured by using Kelvin structure and temperature coefficient resistivity of copper . This study provides better understanding of electromigration behavior in flip-chip solder joints with low bump heights.

並列關鍵字

electromigration ； low-bump-height

參考文獻

1. K.N. Tu, “Reliability challenges in 3D IC packaging technology”, Microelectronics Reliability, 51, 517-523, 2011.

3. Tomlinson, W. and A. Fullylove, “Strength of tin-based soldered joints”, Journal of materials science, 27 (21): p. 5777-5782, 1992.

8. H.B Huntington and A.R. Grone, J., ”Current-induced marker motion in gold wires”, Phy. & Chem. Solids, Vol. 20, Issue 1-2, pp. 76-87,1961.

11. L. Y. Zhang, S. Q. Ou, J. Huang, K. N. Tu, S. Gee, and L. Nguyen, Appl. Phys. Lett. 88, 012106, 2006.

16. S. H. Chiu, T. L. Shao, Chih Chen, D. J. Yao, and C. Y. Hsu, “Infrared microscopy of hot spots induced by Joule heating in flip-chip SnAg solder joints under accelerated electromigration”, Appl. Phys. Lett, 88 , 022110, 2006.