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  • 學位論文

應用於高密度資料儲存與軟性電子之交錯電阻式記憶體

Cross-point Resistive Switching Memory for High-density Data Storage and Flexible Electronics

指導教授 : 侯拓宏 雷添福

摘要


利用電阻式記憶體 (RRAM)所組成的被動型陣列 (passive array) 雖具有最小單元面積4F2 的優異微縮潛力,但位元間的讀取干擾 (read interference) 造成讀取窗口 (read margin) 對整個陣列上的非選取記憶單元 (unselected cells) 儲存狀態有相當程度的相依性,並嚴重地限制了記憶體陣列尺寸的設計,因此開發能適用於電阻式記憶體的選擇元件 (selection device) 是一個非常值得研究的議題。考慮到能與電阻式記憶體匹配的元件,以氧化物為基礎 (oxide-based) 的選擇元件結構簡單、製程微縮容易並可直接與電阻式記憶體形成垂直堆疊結構,是目前最為可行的候選。此論文探討了在室溫環境下,開發出分別適用單極切換 (unipolar RRAM) 與雙極切換 (bipolar RRAM) 的氧化物選擇元件並針對在交錯型陣列 (crossbar array) 所遇到的問題來做完整分析。 首先,我們利由Ti/TiO2與TiO2/Pt 介面的蕭基能障特性,成功地在室溫環境下製造出有高整流特性的Ti/TiO2/Pt二極體元件。在實驗的觀察中,由於TiO2氧化物中的氧離子隨外加偏壓會有不均勻分佈的移動,使得這些氧缺 (oxygen vacancy) 所造成的局部傳導路徑 (filament) 促使二極體元件擁有相當高的順向電流。接著,由於Ti/TiO2/Pt二極體優異的低溫整合能力,我們可以將二極體與Ni/HfO2/Pt記憶體元件整合至可撓式基板 (flexible substrate) 上進一步去驗證1D1R架構的單極電阻切換特性,其高整流開關比與穩定的切換特性可以實現至512 Kb大小的記憶體容量。 另一方面,我們也針對雙極切換的電阻式記憶體開發出適用的選擇器 (selector)。由於雙極的切換特性,雙極性選擇器需具有足夠高的雙向導通電流去達成組態切換的需求與高非線性程度 (nonlinearity) 去抑制讀取干擾。因此,我們藉由Ni/TiO2介面的蕭基能障所控制的非線性電流-電壓特性製作出對稱結構的Ni/TiO2/Ni選擇器。在阻態切換特性方面,我們使用了Ni/TiO2/Ni選擇器與Ni/HfO2/Pt記憶體元件去驗證1S1R雙極切換能力。除了1S1R較穩定的雙極切換特性之外,藉著簡單的預測模型,我們也發現1S1R比1D1R俱有更優異的應用潛力。 最後,實驗的結果顯示,Ni/HfO2/Pt記憶體元件應用到軟性基板下可以承受高度彎曲 (bending)、超過106次的操作容忍度 (endurance) 與快於100奈秒的操作 (SET/RESET) 速度。藉由等效電路的計算結果,我們開發出高導通電流密度 (~105 A/cm2) 與高非線性程度 (~103) 的 Ni/TiO2/Ni 選擇器擁有應用到兆位元級記憶容量的潛力。另外,由於氧化物元件優異的低溫整合能力,我們也成功的將垂直整合結構Ni/TiO2/Ni/HfO2/Pt驗證到8 × 8的軟性記憶體陣列上,並可以明確的判讀出陣列中記憶體元件的高低組態。我們相信此篇論文的研究成果可以提供未來應用在高效能軟性記憶體設計的重要研究方向。

並列摘要


Cross-point RRAM with 4F2 cell size has attracted a great attraction because of its superior scalability. However, read interference between neighboring cells in passive arrays has become a serious issue, where the read margin depends strongly on the stored patterns of the unselected cells. This may significantly limit the maximum available array size. Therefore, it is in urgent need to design a suitable selection device for crossbar RRAM to improve read margin but without sacrificing high cell density. Considering the process compatibility, oxide-based selection devices is a promising candidate to reduce the sneak current because of its simple structure, excellent scalability and low-temperature processes allowing vertically stacking with RRAM. In this thesis, we introduced two selection devices compatible with room-temperature process for unipolar RRAM and bipolar RRAM, respectively. Firstly, we fabricated a room-temperature Ti/TiO2/Pt oxide diode with an excellent rectifying characteristic by the asymmetric Schottky barriers at the Ti/TiO2 and the TiO2/Pt interfaces. The experimental results show that the current transport was governed by the localized oxygen-deficient TiO2 filaments, which contributes the high forward current in the Ti/TiO2/Pt oxide diode. Furthermore, a flexible one diode-one resistor (1D1R) memory cell, consisting of Ti/TiO2/Pt diode with a large rectifying ratio and a stable unipolar resistive-switching (RS) Ni/HfO2/Pt memory element, was fabricated using only room-temperature processes. Due to its superior rectification ratio of 1D1R cell, it can effectively realize a crossbar array as large as 512 Kb. On the other hand, a nonlinear selector for bipolar RRAM in the crossbar array was fabricated using a simple Ni/TiO2/Ni metal-insulator-metal (MIM) structure. The highly nonlinear current-voltage characteristics were realized by the Schottky barrier at Ni/TiO2 interfaces. The series connection with a HfO2 resistive memory shows a reproducible bipolar RS. Predicted by a simple analytical calculation, one selector-one resistor (1S1R) cell shows even more promising potential as compared with the 1D1R cell. Finally, the flexible Ni/HfO2/Pt memory element with superior properties, including excellent immunity to mechanical bending, reliable cycling and fast SET/RESET speed were demonstrated. Additionally, a flexible Ni/TiO2/Ni selector with a high current density of 105 A/cm2 and highly nonlinear I-V was capable of gigabit memory arrays implementation. We eventually realized a vertically stacked Ni/TiO2/Ni/HfO2/Pt 1S1R cell on a flexible 8 × 8 crossbar array, where the HRS/LRS states of the selected cell were successfully read out. We believe that our research provides a clear path for future high-performance flexible memory applications.

參考文獻


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