共源共柵暨回授反相低雜訊放大器之設計研究

A Low Noise Amplifier Design Using Common Source Common Gate NMOS and Feedback CMOS Inverter

曾慶明(Ching-Ming Tseng)

指導教授 ： 黃瑞彬 ； 蕭承麒

國立交通大學/電機學院/電機學院電信學程/碩士(2015年)

https://doi.org/10.6842/NCTU.2015.00791

摘要

本文主要探討節省功率消耗的射頻收發機的接收部分兩款基本放大單元構成,配合當前低成本製成的半導體製程,特別探討雜訊分析版本與誤差之改善問題,使得雜訊因子方程式在定性分析描述的基礎上,提供有較高定量分析參考價值.
敘述之要點如下
第一章:先描述選擇研究題目的動機,相關的文獻回顧,與本文的研究方法.
第二章:彙整貫串於本文中的比較共通性的預備知識,評鑑電路屬性之基準與雜訊分析方程式的準確度.
第三章:描述放大器第一級共源共柵級之設計與模擬,直流分析,串聯共振匹配,並聯共振負載,匹配頻率響應,雜訊指數分析特別探討.
第四章:描述放大器第二級回授反相級之設計與模擬,直流分析,等效電路彙整,雜訊指數分析特別探討,包括,各項熱雜訊源轉移函數,功率頻譜密度函數,雜訊因子方程式的次第組成,半導體熱雜訊參數之精確度驗證.
第五章:描述將放大器第一級與第二級串級後,經過三次評鑑,改造為串級三級可調增益放大器之模擬.
第六章:結論,歸納電路設計要點與雜訊訊分析較準確方法.展望,簡述本文的研究進展與寄望後續研究者可探究的方向.

關鍵字

共源共柵 ； 回授 ； 反相器 ； 低雜訊放大器 ； 互補金屬氧化物半導體

並列摘要

This thesis studies a cascaded low noise amplifier which is composed of stages of amplifiers for the application in modern RF transceivers. Design considerations on power consumption, transducer gain, and noise factor of the amplifier were carefully considered. Special design consideration on the analytical equations to estimate noise factor of the amplifier has been validated with high accuracy.
The contents of this thesis are partitioned as follows:
Chapter one is to describe the motivation of this research, relevant literature review, and research methodologies which is used in this research.
Chapter two summarizes the fundamental knowledge for evaluating the circuit parameters of an amplifier and with emphasis on the noise properties.
Chapter three describe the analytical design and simulation on the first stage of the amplifier, DC analysis, series resonance matching, parallel resonant matching, frequency response, and noise figure analysis.
Chapter four is for the description of the second stage feedback inverting amplifier. Emphases were on the design and simulation of the DC analysis, the equivalent circuit archive, and noise figure analysis which includes the thermal noise source of the transfer function, power spectral density function, noise factor equation sequence composition, and the accuracy of the thermal noise parameters of the amplifier.
Chapter five is on the simulation of a cascade amplifier composed of the above first and the second stage amplifiers. After three times of test and evaluation the amplifier has been transformed into a three-stage amplifier with adjustable power gain.
Chapter six is composed of concluding remarks, outlines of accurate design methods , prospects and further studies of this thesis.

並列關鍵字

common gate common source ； feedback ； inverter ； Low Noise Amplifier ； LNA ； Complementary Metal-Oxide Semiconductor ； CMOS ； NMOS

參考文獻

2011, pp. 61-81.

[4] J. W. M. R. C. Plett, Radio Frequency Integrated Circuit Design, 2nd Edition,

[6] Rashad.M.Ramzan, “Tutorial-2 Low Noise Amplifier (LNA) Design,” EE Department,

FAST-NU, Islamabad, Pakistan, 2010.

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 第 冊VOL. 32, 編號 NO. 5, MAY 1997.