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  • 學位論文

非磁性半導體磁阻元件探討

Investigation of non-magnetic semiconductor magnetoresistance devices

指導教授 : 林聖迪

摘要


在此研究領域,四族的矽以及三五族的InGaAs半導體材料,所製作的磁阻元件在常溫時的特性,已經被大量的研究。藉由標準CMOS製程中的HV18完成的幾何型二極矽磁阻元件,在電極間距為6.66 um,磁場為1 T時,有最大的磁阻1.44 %。接著,我們採用具有異常磁阻(EMR)效應的金屬-半導體混合型結構,來製作磁阻元件,在標準CMOS製程下完成的四極磁阻元件,分別有IVVI及IVIV兩種組態來進行量測,在磁阻元件的外觀上,藉由改變電極的排列、半導體與金屬的幾何參數、微縮的特性,來最佳化磁阻數值,雖然在非對稱結構中,IVIV組態量測下,磁場為1 T時,可量測到最高的磁阻特性為150 %,但相對應之敏感度卻不是很高,而且在IVIV組態量測下,EMR效應會引入霍爾效應。最後,我們設計了二極InGaAs磁阻元件,其磁阻及敏感度特性,在磁場為1 T時,不同元件表現上,分別為17.2 %及488.1 ohm/T,是本製程中最高的兩個磁阻元件。此外,我們也使用了COMSOL模擬軟體進行了所有磁阻元件的模擬,並將模擬與量測結果放一起,一併討論與比較。

關鍵字

磁阻 三五族半導體 CMOS製程

並列摘要


In this work, the Si- and InGaAs-based magnetoresistance (MR) devices have been extensively investigated at room temperature. For the two-terminal geometrical MR Si devices, the highest MR of 1.44 % at 1 T is obtained with the device of 6.66-um contact distance by using the HV18 CMOS technology. For the MR devices with metal-semiconductor hybrid structure to exhibit so-called extraordinary MR (EMR) effect, four-terminal measurement in IVVI and IVIV configurations are performed with CMOS-made MR devices. In this aspect, the contact arrangement, geometry of semiconductor and metal, and scaling properties are studied to maximize the MR value. Although a very high MR of 150 % at 1 T is achieved with an asymmetrical device in IVIV configuration, the corresponding sensitivity is not good and the included Hall voltage shadows the EMR effect. At last, the two-terminal InGaAs MR device is prepared and a high MR of 17.2 % and good sensitivity of 488.1 ohm/T is demonstrated experimentally. Theoretical simulation is also carried out and the results are discussed and compared with the experimental ones.

參考文獻


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