- 學位論文
應用田口方法於半導體晶圓盒製造最佳化
Application of Taguchi Method in Optimization of Manufacturing Semiconductor Wafer Carrier
摘要
本文主要是探討田口方法應用於半導體晶圓盒 (wafer carrier) 製造最佳化之研究。在半導體工業皆是以機器手臂取放晶圓，如承載之晶圓盒尺寸有偏差，即會使晶圓片破損、不良，造成半導體廠商嚴重的損失。故本研究以晶圓盒第一至第二十五溝槽中心距 (pitch) 尺寸為品質特性，採望目特性，實驗建構L9(34) 直交表，並以模具溫度、射出速度、保持壓力、保壓時間四個控制因素配合三個不同水準，分析聚醚醚酮/碳纖維複合材料 (PEEK/CF) 射出成型加工參數影響晶圓盒Pitch尺寸的程度，以進一步確立最佳加工參數值來提升產品的品質。 經由實驗結果顯示，模具溫度是影響晶圓盒Pitch尺寸穩定的首要因子，其次為射出速度、保壓時間、保持壓力。變異數分析 (ANOVA) 顯示，模具溫度因子在本實驗中貢獻度達55.6%，射出速度貢獻度達29.5%。模具溫度與射出速度在本研究結果顯示為顯著因子，保持壓力與保壓時間貢獻度僅6.0%與8.9%，影響程度較小。經由田口方法歸納出最佳加工參數為模溫190˚C、射出速度5 cm/s、保持壓力70 MPa、保壓時間9 sec。以最佳加工參數所生產之晶圓盒Pitch尺寸標準差從現行的0.1095 mm，降低至0.022 mm，變異性已大幅減小，比現行條件生產之產品更為接近尺寸設計值。
並列摘要
In this study, the Taguchi Method, used in manufacturing semiconductor wafer carrier. Wafers were loaded/unloaded by robots and were transported by wafer carriers in semiconductor fabrication. It causes a lot of damage if wafers were broken by out of the specification wafer carrier. The purpose of this study was to improve the accuracy of injection molding and minimize the slot pitch dimensional tolerance of wafer carrier. Therefore, slot pitch was defined to quality characteristics, nominal-the-best and L9(34) orthogonal array were adopted in this study. The control factors of molding temperature, injection speed, holding pressure, holding time were used to analyze to what influence the processing parameters would work on the product quality in order to elevate the pitch of a wafer carrier with optimal processing parameters. As the results indicated that mold temperature has the greatest influence on the pitch dimension of wafer carrier, second was injection speed, third was holding time and the last was holding pressure, the contribution was 55.6% of mold temperature, and was 29.5% of injection speed after ANOVA. Moreover, using Taguchi Method to carry out the optimal injection molding process conditions were 190˚C for mold temperature, 5 cm/s for injection speed, 70 MPa for holding pressure, 9 sec for holding pressure time. After optimal processing parameters, the standard deviation result of wafer carrier pitch dimension was 0.022mm instead of 0.1095 mm from original process parameters and closer to the design specification than the present.