標準CMOS製程結合後製程之850-nm矽累崩光檢測器

850-nm Si Avalanche Photodiodes in Standard CMOS Technology with Back-end Process

黃智愛(Chih-Ai Huang)

指導教授 ： 辛裕明

國立中央大學/資訊電機學院/電機工程學系/碩士(2014年)

摘要

本論文利用0.18 µm標準CMOS製程結合後製程實現850-nm矽累崩光檢測器，為了排除基板空乏區外照光而產生之擴散載子，利用後製程來蝕刻元件之背面基板，達到直接排除擴散載子之效果。透過Silvaco公司之二維元件模擬軟體研究，基板厚度的減少可改善擴散載子造成之頻率響應滑落(roll-off)的情形，進而提升3-dB頻寬。同時針對不同的元件結構設計，分別為水平式之累崩光檢測器以及P-I-N結構之光檢測器，將其操作在累崩區來做比較。最後並接著針對矽累崩光檢測器之吸光區尺寸作進一步的分析，透過金屬層區隔累崩區及吸光區，隨著吸光區寬度的減少，所收集到的光電流中擴散載子成份也會下降，使得元件之3-dB頻寬提升至8 GHz。另外也利用光脈衝響應之量測，研究不同元件對脈衝的反應，分析出長尾巴效應(long tail effect)的存在與頻寬的關係。

關鍵字

光檢測器 ； 標準CMOS製程 ； 後製程

並列摘要

This study presents lateral avalanche photodetectors (APDs) implemented in standard 0.18 µm CMOS technology operating at 850-nm wavelength. In order to reduce the slow diffusion carriers generated within the Si substrate, it is necessary to utilize simple back-end processes after standard CMOS process to remove thick Si substrate. Silvaco TCAD simulation is used to verify that the diffusion roll-off in APD could be improved by reducing the diffusion component of photo-current by thinning the Si substrate. Furthermore, this study compared different device structures including avalanche photodetectors and P-I-N photodetectors after substrate thinning. Finally, the different absorption region widths of APDs are discussed. While the absorption region width decreased, the amount of diffusion carriers is reduced in photo-current and thus achieved 3-dB bandwidth of 8 GHz. Besides, long tail effect in connection with frequency response can be verified by the pulse measurement.

並列關鍵字

Photodiodes ； CMOS ； Back-end Process

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