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  • 學位論文

第四代雙倍資料率同步動態隨機存取記憶體連接器應力與最佳化分析

指導教授 : 林志光
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摘要


本研究目的為針對第四代雙倍資料傳輸記憶體連接器,在有限空間中,設計出可保有良好電子特性外亦有足夠正向力的端子,為了達到此目標,必須保有一般業界常用的下料式與折彎式端子的優點,而設計出另一種全新型式端子。在研究過程中,針對影響端子正向力相關尺寸,以有限元素分析法模擬分析其正向力大小,以一次一因子方式篩選,最後選出影響端子正向力最大的幾個尺寸當控制因子。進一步以田口實驗法,針對直交表不同尺寸組合,作模擬實驗分析並計算各組實驗S/N雜訊比,製作反應圖與反應表找出最佳化參數尺寸。最後依照最佳化參數尺寸做實物實測,驗證比對實測結果與最佳化模擬分析結果是否有一致性。 在最佳化參數分析中,上排端子得到的最佳化參數尺寸組合為力臂水平長度= 1.76 mm、力臂寬度= 0.51 mm、折彎處內圓半徑= 0.20 mm、力臂與卡點下緣間隙= 0.10 mm。而下排端子得到的最佳化參數尺寸組合為力臂水平長度= 2.70 mm、折彎處內圓半徑= 0.35 mm、折彎處外圓直徑= 1.80 mm、力臂與卡點下緣間隙= 0.10 mm。由最佳化結果得知,上排端子正向力比初始設計提升約27%,下排端子正向力則提升約55%。而實驗結果與最佳化模擬結果比較,其上、下排端子誤差率分別為6.9% 和1.9%。

關鍵字

連接器 端子 應力

並列摘要


The purpose of this study is to develop a DDR4 connector in a limited space with a combination of good electronic connection and proper normal forces acting on the terminals. To achieve this goal, a new design of the connector terminals is proposed by taking advantages of two common designs in electronic industry, namely blanking type and forming type. A finite element analysis (FEA) technique is firstly applied to determining the control factors of geometric dimensions in terms of the normal forces acting on the connector terminals. By taking the normal forces as a quality characteristic, a Taguchi method and a relevant orthogonal array are employed to determine an optimal combination of the geometric dimensions in the new connector design, with the aid of structural analysis by FEA. A prototypical connector is made according to the optimized dimensions to conduct a plug-in and pull-out test for verifying the simulations. Analysis results indicate the optimal combination of the geometric dimensions in the upper terminal has a horizontal length of force arm of 1.76 mm, a width of force arm of 0.51 mm, an inner radius of 0.20 mm at the curved arm, and a clearance of 0.1 mm between the force arm and the upper interference point. The bottom terminal has an optimal combination of geometric dimensions with a horizontal length of force arm of 2.70 mm, an inner radius of 0.35 mm and an outer diameter of 1.80 mm at the curved arm, and a clearance of 0.1 mm between the force arm and the lower interference point. Compared to the original design, the optimized design can increase the normal force by 27% for the upper terminal and by 55% for the lower terminal. An excellent agreement is found between the simulations and experimental measurements for a difference of 6.9% and 1.9% in the normal force acting on the upper and lower terminal, respectively.

並列關鍵字

無資料

參考文獻


1. “Company Profile-Connector,” Internal Documents of the Company, Bellwether Electric Co., Ltd., 2014
2. Tandee, “記憶體10年技術演進史,”
http://www.techbang.com/posts/17190-development-history-of-memory-ddr-and-gddr-difference-in?page=3, accessed on May 3, 2014.
3. G. Allan, “The Love/Hate Relationship with DDR SDRAM Controllers,”
http://www.design-reuse.com/articles/13805/the-love-hate-relationship-with-ddr-sdram-controllers.html, accessed on Jun 7, 2014.

被引用紀錄


廖家慶(2005)。車輛乘適性能分析與驗證〔碩士論文,國立臺灣大學〕。華藝線上圖書館。https://doi.org/10.6342/NTU.2005.02739

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