透過您的圖書館登入
IP:18.223.172.252
  • 學位論文

高轉換效能電流模式控制之降壓式電源轉換器

A High Efficiency Current Mode Control DC-DC Buck Converter

指導教授 : 鄭國興
若您是本文的作者,可授權文章由華藝線上圖書館中協助推廣。

摘要


可攜式電子產品短小輕薄功能完整是產品趨勢也是主要的需求,因此低功率高效率成為可攜式電子產品的首要考量,這些利用電池為電力來源的電子電路需要一個能夠提供穩定電壓的電源轉換電路,此電源轉換電路必須要是低功率消耗與高轉換效能,以延長電池工作時間,為提升轉換效能本論文題出一個電流模式控制之降壓式電源轉換器。 本論文所提出的電流模式控制降壓式電源轉換器,其原理主要是利用偵測電感上電流變化以加速因負載改變時之暫態反應時間,再將一般電流模式控制中所需要用到的電壓轉電流電路去除並且利用電路設計技巧降低內部各個子電路的操作電流消耗,進而提升整體的轉換效能。相較於一般電流模式控制穩壓,此穩壓器會有較高的轉換效能, 此電流模式控制降壓切換式穩壓器的電路設計是以台灣積體電路製造股份有限公司0.35 um 3.3 V 互補式金氧半製程來實現, 而工作電壓的範圍為3.8 V~5.5 V , 操作頻率為1.5 MHz,負載電流範圍為0.05 A~1 A,及轉換效能為97.4 %。此降壓式電源轉換器之線性調節度與負載調節度分別為17.5 mV/V 與1.15 mV/A,晶片面積為2.46 mm2。

並列摘要


In this changing rapidly era of electronic technology, the major demands of portable electronics are short, thin, and full functionalities. These sub-circuits of the portable electronics, which use batteries for power sources, need a stable supply voltage generating by power converters. These power converters must have low power consumption and high efficiency to extend the service time of portable electronics. Thus, a high efficiency current mode buck converter is presented in this thesis. The proposed buck converter uses current-mode controlling mechanism to accelerate the transient response during the transient period. It senses the current variation of the output inductor. Therefore, it achieves low operating current and high efficiency by removing the V-to-I converting circuit. This buck converter has better performance in the specification of efficiency comparing with traditional buck converter with current-mode controlling. This current-mode buck converter is fabricated with TSMC 0.35um 3.3 V CMOS process. In the proposed buck converter, the operation voltage is form 3.8 V to 5.5 V, the output voltage is 3.3 V, the output current is from 0.05 A to 1 A, and the highest efficiency is 97.4 %. The line regulation and load regulation are 17.5 mV/V and 1.15 mV/A, respectively. The chip area is 2.46 mm2.

參考文獻


[3] G. A. Rincon-Mora and P. E. Allen, “A low-voltage, low quiescent current, Low drop-out regulator,” IEEE J. Solid-State Circuits, vol. 33, no. 1, pp. 36–44, Jan. 1998.
[4] P. Favrat, P. Deval and M. J. Declercq, “A high-efficiency CMOS voltage doubler,” IEEE J. Solid-State Circuits, vol. 33, pp. 410-416, Mar. 1998.
[7] P. K. T. Mok, “Converter design for integrated power management system,” Tutorial presented at the International Symposium on VLSI Design, Automation and Test, Apr. 2010.
[8] W. R. Liou, T. H. Chen, Y. L. Kuo, T. Y. Huang and M. L. Yen, “A high efficiency dual-mode buck converter IC for portable applications,” IEEE Trans. Power Electron., vol. 23, no. 2, pp. 667–677, Mar. 2008.
[9] H.-H. Huang, C. L. Chen and K. H. Chen, “Adaptive window control (AWC) technique for hysteresis dc–dc buck converters with improved light and heavy load performance,” IEEE Trans. Power Electron., vol. 24, no. 6, pp. 1607-1617, Jun. 2009.

被引用紀錄


周訓仰(2015)。應用於生醫系統之低壓降穩壓器(LDO)設計〔碩士論文,國立中央大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0031-0412201512095976
曾俊傑(2015)。具責任週期偵測器之電壓式直流對直流降壓轉換器〔碩士論文,國立中央大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0031-0412201512091174

延伸閱讀