新興非揮發性記憶體之變異感知電路設計技術

Variation-Aware Circuit Design Techniques for Emerging Non-volatile Memory

許世玄(Shyh-Shyuan Sheu)

指導教授 ： 張孟凡 ； 鄭國興

國立中央大學/資訊電機學院/電機工程學系/博士(2012年)

摘要

消費性電子產品的發展以多功能、高效能、長待機時間及輕薄短小為主要趨勢，其產品中所需之記憶體未來亦朝向大容量、高讀寫速度、低功率消耗及高使用壽命邁進。長期以來，記憶體從SRAM、DRAM等揮發性記憶體為主的技術、慢慢朝向以Flash、PCM、MRAM、FeRAM及ReRAM等非揮性記憶體來取代揮發性記憶體或同時共存之技術。非揮發性記憶體具有無電力狀態時，資料仍可保存之特性，因而讓消費性產品具有零待機功率消耗與快速開機等優勢。目前非揮發性記憶體主流以Flash記憶體為主流。然而Flash資料讀寫的時間長(約us~ms)，限制產品操作速度; 而其讀寫次數(endurance)只有約105次，限制產品之使用壽命。面對Flash所將面臨的技術瓶頸，許多國內外大廠與研究機構均紛紛投入相變化記憶體(PCM)、磁性記憶體(MRAM)、鐵電記憶體(FeRAM)及電阻式記憶體(ReRAM)等下世代記憶體的開發，期望找出同時具有高讀寫速度、高讀寫次數，低電流寫入，低功率消耗之非揮發性記憶體以應用於未來的消費性產品需求。而本論文即是探討下世代記憶體中的PCM及RRAM，並分別討論其特性、面臨到的問題瓶頸、改善方法與Macro電路設計。
首先，本論文將提出目前記憶體的趨勢與需求，其次將針對PCM之特性予以分析討論，由於PCM主要特性是以內部晶格型態來儲存記憶體狀態。當晶格為結晶態(crystalline)時，為低阻態; 反之，當晶格為非晶態(amorphous)時，為高阻態。由於晶格型態是使用熱能來改變，因此PCM將使用電壓或電流流經元件以產生改變晶格型態所需之熱能。也因此將有電壓寫入與電流寫入二種方法與寫入電路。然而在記憶體Macro中，較長位元線(large number cells per bit-line)容易因為RC delay關係，造成寫入能量不足而導致元件無法轉態，降低記憶體可靠度。本篇文章將採用電流式寫入電路，並提出一自動偵測並補償較長位元線(large number cells per bit-line)所造成寫入能量不足之方法與電路，以提升其記憶體可靠度。
接著本論文將提出速度及耐熱度都比PCM要佳的ReRAM。ReRAM是以氧空缺造成filament形成或斷裂，來決定低阻態或高阻態。但因filament本身的鍵結，會有不同的變異，導致寫入之成功率下降，本論文提出寫入驗證電路，在寫入時予以進行驗證是否寫入成功，以提高記憶體可靠度。
論文最後將討論PCM 與ReRAM各自的優勢與缺點，並將提出未來ReRAM繼續發展之工作與未來之挑戰，以期ReRAM能應用於未來輕、薄、快速、待機時間長之新世代產品。

關鍵字

讀取驅動電路 ； 寫入驅動電路 ； 電阻式隨機存取記憶體 ； 相變化記憶體

並列摘要

The development goals of consumer electronics products are multi-function, high performance, long standby time, small and thin. The memories of these products need high density, high read/write speed, low power consumption and long life time. The volatile memories including SRAM and DRAM have been used for long time. Nowadays, the volatile memory was integrated with non-volatile memory in many applications. The volatile memory in some products were even replaced by non-volatile memory to achieve the advantage of low power consumption. The non-volatile memory has many advantages, such as data storage without power supplication, zero standby power, and instant reboot. At present, the main stream non-volatile memory is Flash memory due to its low cost and power consumption. However, the Flash technology still have some issues to limit it development, such as slow write speed (us~ms), poor endurance (105) and higher write voltage ( > 5 Volt). For the request of future consumer products, many famous companies start to research several emerging non-volatile memories, such as phase change memory (PCM), magnetic memory (MRAM), Ferro-electric memory (FERAM) and resistive memory (ReRAM). This thesis focuses on two promising memories including PCM and RRAM.
At first, the introduction of memory technology was addressed. The second is the PCM characteristic. The resistance of PCM is dependent on the crystal structure of the phase change material. When phase change material of PCM device is crystalline, the device is low resistance state (LRS). When phase change material of PCM device is amorphous state, this device is high resistance state (HRS). Because the resistance change of the PCM device is by using joule heat, the device needs to be applied current or voltage to change its resistance state. Hence, two types of write circuit are implemented in peripheral circuit. One is current write circuit and another is voltage write. However, the large number of cells per bit-line has write fail due to the RC delay effect. The RC delay effect will cause the insufficient energy and fail the write operation. In this paper, a path tracking write scheme and circuit has been proposed. With this circuit, the large number cells per bit-line will compensate the energy by the path tracking write circuit to improve the reliability of PCM operation
Next, this thesis proposes the ReRAM technology. The ReRAM device has many outstanding characteristics, including fast switching speed and high temperature reliability. These performances of RRAM are better than those of PCM. The resistance of ReRAM is decided by the connection or rupture of conductive filaments which is composed of oxygen vacancies. However, the over-RESET, which weakens the filament structure, leads to write failure. This paper proposed the write-verify circuit to prevent the over-RESET and improve the reliability.
Finally, the comparison between PCM and ReRAM are discussed. The challenge and future work are also proposed in the last chapter. For the ultra-slim, high performance, and high life time product request, the emerging non-volatile memory will combination the 3DIC technology to achieve these request of future product.

並列關鍵字

read driver ； write driver ； resistive random access memory ； phase change memory

參考文獻

[1] M. F. Chang, S. M. Yang, C. W. Liang, C. C. Chiang, P. F. Chiu, K. F Lin, Y. H. Chu, W. C. Wu, H. Yamauchi, “A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications," IEEE International Solid-State Circuits Conference (ISSCC) Dig. Tech. Papers, pp. 266-267, Feb. 2010

[2] M. F. Chang and S. J. Shen,“A process variation tolerant embedded split-gate Flash memory using pre-stable current sensing scheme,” IEEE J. Solid-State Circuits, vol. 44, no. 3, pp.987-994, Mar. 2009.

[3] H. R. Oh, B. H. Cho, W. Y. Cho, S. Kang, B. G. Choi, H. J. Kim, K. S. Kim, D. E. Kim, C. K. Kwak, H. G. Byun, G. T. Jeong, H. S. Jeong, and K. Kim, “Enhanced Write Performance of a 64-Mb Phase-Change Random Access Memory,” IEEE J. Solid-State Circuits, vol. 41, no. 1, pp.122-126, Jan. 2006.

[4] K. J. Lee, B. H. Cho, W. Y. Cho, S. Kang, B. G. Choi, H. R. Oh, C. S. Lee, H. J. Kim, J. M. Park, Q. Wang, M. H. Park, Y. H. Ro, J. Y. Choi, K. S. Kim, Y. R. Kim, I. C. Shin, K. W. Lim, H. K. Cho, C. H. Choi, W. R. Chung, D. E. Kim, Y. J. Yoon, K. S. Yu, G. T. Jeong, H. S. Jeong, C. K. Kwak, C. H. Kim, and K. Kim, “A 90 nm 1.8 V 512 Mb Diode-Switch PRAM with 266 MB/s Read Throughput ,” IEEE J. Solid-State Circuits, vol. 43, no. 1, pp.150-162, Jan. 2008.

[5] T. Kawahara, R. Takemura, K. Miura, J. Hayakawa, S. Ikeda, Y. M. Lee, R. Sasaki, Y. Goto, K. Ito, T. Meguro, F. Matsukura, H. Takahashi, H. Matsuoka, and H. Ohno,“2 Mb SPRAM (SPin-Transfer Torque RAM) with Bit-by-Bit Bi-Directional Current Write and Parallelizing-Direction Current Read ” IEEE J. Solid-State Circuits, vol. 43, no. 1, pp.109-120, Jan. 2008.