非結晶相之銪摻雜氧化銦鋅的薄膜電晶體製備及光電特性研究

The Fabrication and Photoelectric Characteristics Study of Amorphous phase Europium-doped Indium Zinc Oxide Thin Film Transistors (a-EuIZO TFTs)

王清華(Wang, Tsing Hua)

指導教授 ： 丁初稷

國立中正大學/工學院/光機電整合工程研究所/碩士(2012年)

摘要

本實驗使用溶凝膠法製作非結晶相銪摻雜氧化銦鋅之透明導電薄膜，在500 OC 的燒結溫度下，使其應用於薄膜電晶體之主動層，並製作成銪摻雜氧化銦鋅薄膜電晶體 (EuIZO-TFT)。摻雜銪原子可以抑制氧空缺的產生，減少載子濃度，可降低電晶體漏電流，因為從電負度比較來看銪 (1.0)、鋅 (1.65)、銦 (1.78)、氧 (3.44)，銪與氧的電負度相差較大，因此銪可與氧形成較強的鍵結。在銪、銦、鋅莫爾比= 0.13:1:1 (Eu = 13%) 為最佳之EuIZO-TFT特性，其特性分別為，元件開關比 (Ion/off ) ratio = 1.1×106，臨限電壓 (Vth) = 3.28 V，輸出電流最大值IDS = 3.59×10-4 A，飽和區載子遷移率μSat = 1.23 cm2/Vs，次臨限擺幅值S.S.值= 2.28 V/decade。本篇碩論會探討銪摻雜氧化銦鋅(EuIZO) 的化學劑量、結晶性、電性、光學特性來證明，藉由調變不同銪的莫爾比例，可以達到控制載子濃度並影響電晶體的特性。
另外探討主動層在不同的燒結溫度下 (400、500、600、700 oC)，以及通道之長寬比不同對電晶體之影響，由實驗結果顯示:固定銪、銦、鋅莫爾比 = 0.13:1:1 (Eu = 13 %) 的薄膜電晶體，隨著改變主動層的燒結溫度400 oC至700 oC，載子移動率會逐漸升高，直到700 oC時下降；在固定寬度與改變不同通道長度方面，由實驗結果顯示:固定銪、銦、鋅莫爾比 = 0.13:1:1 (Eu = 13%) 的薄膜電晶體，隨著改變通道長度50至300 nm，汲極電流逐漸增加，載子移動率也從0.6 cm2/Vs增加至1.8 cm2/Vs。

關鍵字

銪摻雜氧化銦鋅 ； 薄膜電晶體

並列摘要

Sol-gel-processed thin-film transistors (TFTs) with amorphours Eu-In-Zn-O (EuIZO) as an active layer were fabricated with various mole ratio of Eu. This behavior indicates that Eu could play the role of carrier suppresspr in InZnO (IZO) systems and reduce off current of Eu IZO-TFT. Because the difference in eletronegativity between Eu (1) and O (3.44) is greater than the difference between Zn (1.65) or In (1.78) and O, the Eu tended to combine with O more strongly than with Zn or In. The optimum EuIZO TFT occurred at a EuIZO mole ratio of 0.13:1:1 and its channel mobility, threshold voltage, subthreshold swing voltage, and on/off ratio were 1.23 cm2/Vs, 3.28 V, 2.28 V/decade, and ~106, respectively. In this master, The stoichiometry , crystallinity, electrical and optical properties of EuIZO films were investigated with the aim of controlling the carrier effect by changing the TFT electrical characteristics through variations in the Eu mole ratio.
In addition to explore the impact of the transistor,by the active layer in the different sintering temperatures (400,500,600,700 oC), and fixed aspect ratio of channel. The results from the experiments show: Eu 13% doped indium oxide thin-film transistor with the change of the active layer of the sintering temperature of 400 oC to 700 oC, the carrier mobility will be gradually increased until 700 oC down;The results from the experiments show: Eu 13% doped indium oxide thin-film transistor with the change the channel length of 50 to 300 nm,, the drain current is gradually increased, mobility is increased from 0.6 cm2/Vs to 1.8 cm2/Vs.

並列關鍵字

EuIZO ； TFT

參考文獻

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