經驗模態分解(Empirical Mode Decomposition;EMD)已被證實在「非線性(non-linear)」與「非穩態(non-stationary)」的訊號分析中有著卓越的效果,但其運算量與耗用記憶體極大,故少見其應用在嵌入式即時訊號處理中。本論文針對EMD需求大量記憶體之立方雲線計算提出「分段式(segmented)立方雲線(cubic spline)計算」有效降低系統緩衝記憶體需求;另外對於分段式立方雲線中的兩組參數分段長度(n)及重疊點數(m)影響提出一套探索方法,並指出當其變化時對於系統整體處理能力、訊號品質、平行化程度及記憶體使用量的影響程度。最後本論文提出「適用於軟體與硬體的EMD平行計算架構」進一步地縮減其整體的計算時間。本論文所提出之「分段式立方雲線計算」、「分段系統參數探索方法」及「適於分段式立方雲線EMD平行計算架構」等最佳化設計均以FPGA完成驗證。並相對於原始EMD演算法中的立方雲線計算,本論文所提出之設計在處理長度2,048點並篩選10次時,可減少95.3%的記憶體使用量。
Empirical mode decomposition (EMD) has outstanding performance in non-linear and non-stationary signal analysis. But it is not widely adopted in embedded and real-time signal processing applications due to its high computing complexity and high memory requirement. This thesis proposes a memory-efficient EMD design with parallel architecture, which has been integrated into an embedded system successfully. First, a memory-efficient segmented cubic spline computation is proposed to reduce the memory requirements in EMD. Then, a systematic exploration is proposed for the segment size & overlapped points of the segmented cubic spline, which affect computing time, quality and memory sizes. Finally, a scalable hardware architecture is proposed for our memory-efficient EMD. The above design techniques have been implemented and verified using FPGA and a real-time processing system has been demonstrated. Compared with the original approach, our proposed algorithm can reduce 95.3% memory in spline computations for 2,048-points EMD.