應用於變異容忍之原位時序錯誤偵測器之能耗與晶片面積成本評估

Evaluation of Area and Energy Overheads of In-Situ Timing Fault Detectors for Variation-Tolerant Datapaths

林泓志(Hong-Chih Lin)

指導教授 ： 林泰吉

國立中正大學/工學院/資訊工程學系/碩士(2015年)

摘要

數位電路的效能受到製程參數飄移、電壓穩定度、操作溫度、計算資料 (process、voltage、temperature、data)及老化 (aging)、時脈振顫 (jitter)等多項變異因素影響。在先進製程下，變異情況會更加嚴重，使得傳統在最差情況設計的方法，效能會受到限制，而時序臆測可變延遲的電路設計，如Razor-I、SL，可容忍錯誤發生，在效能上能比最差情況設計來的好，本文提出將時序臆測可變延遲電路設計，設計在能執行在一般情況 (Typical case)可達到的效能，而且能夠容忍corner-case-based (best case, typical case, worst case)的變異。但時序臆測可變延遲電路有必要的消耗，如Razor-I有短路徑 (short path)問題，需加入緩衝 (buffer); SL雖可解決短路徑問題，但仍需花費時間等待正確值來做比較偵錯，本文提出新型時序偵錯設計SL-TD，使用資料抖動偵錯機制，有更大容錯能力能執行在較高的頻率。最後實驗設計在一般情況下，比較Razor-I與SL的效能和面積與能源消耗，SL能比Razor-I優異21.05%效能，在0.88GHz頻率下還能節省35.94%能源33.03%面積，最後提出新型時序錯誤偵測設計SL-TD，來改善SL的比較器偵錯多花費的時間，進一步提升效能，SL-TD能比SL優異26.67%效能，在1.11 GHz頻率下還能節省42.53%能源40.87%面積。

關鍵字

可變延遲 ； 時序臆測 ； 抗變異 ； 抖動偵測

並列摘要

Process, voltage, temperature, data, aging, jitter and many other factors that affect the performance of digital circuit. Variation will be more serious in the advanced technology. The worst-case design will limit performance. The timing speculation variable latency circuit, such as the Razor-I and SL can tolerate variation let its efficacy better than worst-case design. This paper presents the timing speculation variable latency circuit design, design for typical case can achieve performance and tolerate corner-case-based (best case, typical case, worst case) variation. Then speculation variable delay circuit timing have essential overhead, such as Razor-I have short path problem that have to add buffer. SL solve the short path problem, but still have to spend time waiting for the correct values for timing fault detection. We proposed a new timing fault design SL-TD that use transitions detection to perform at higher frequencies. Experimental result of design for typical case, SL compare to Razor-I enhance performance 21.05%, and save energy 35.94% and area 33.03% at 0.88GHz. Finally, the new timing fault detection design SL-TD can compare to SL enhance performance 26.67%, and save energy 42.53% and area 40.87% at 1.11 GHz.

並列關鍵字

Variable latency ； Timing speculation ； Variation tolerant ； Transitions detection

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