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  • 學位論文

延遲線技術應用於微機電訊號數位化之研究

Research on Delay Line Technology Applied to MEMS Analog to Digital Converter

指導教授 : 沈志雄

摘要


隨著微機電系統的發展,在單晶片小小的面積中所乘載的功能越來越多,在微機電系統的整合中,微機械結構會以各種不同的設計方式將感測訊號轉換成電訊號輸入至電子電路中,但是微機電結構所感測到的電訊號通常都十分微小,以至於感測訊號需要經過許多處理才能被使用。 而與一般用途的游標尺延遲線不同的是,我們利用電壓控制延遲元件組成延遲線,再透過游標尺延遲線計時技術來實現類比數位轉換的功能。在本研究中,我們提出一種新穎式的游標尺延遲線類比數位轉換器(Analog-to-Digital Converter,ADC),利用計時技術與電壓控制延遲線來轉換類比電壓,透過模擬分析可以得知130級的游標尺延遲線ADC其電壓量測範圍為0.3~15.5mV,解析度為2.1~248.9 μV,在低於15mV的電壓量測上可以達到非常高的解析度,而且此設計方法十分彈性,可以根據量測需求來調整量測範圍與解析度。 有別於傳統ADC較複雜的設計,游標尺延遲線ADC具有高度積體化,面積小,簡單且快速轉換等優點。

並列摘要


With the development of micro-electromechanical systems, there are more functions in the chip. In microelectromechanical systems, the micro structure will be designed in various ways to produce the sensing signal to the electronic circuit. The sensing signals in the MEMS structure are very small, so that the signal will be magnified for the circuit can readout. Unlike general-purpose Vernier delay line, we use a voltage controlled delay element to compose Vernier delay line. We use Vernier delay line timing technology to achieve analog to digital conversion. In this study, we propose a novel Vernier delay line Analog-to-Digital Converter(ADC). The voltage controlled delay element changes its delay time by sensing signal. The Vernier delay line which consists of voltage controlled delay elements can converted the variation of delay time into digital signal. The simulation analysis shows that Vernier delay line ADC’s voltage measurement range is 0.272 ~ 15mV, and resolution is 2.11 ~ 248.9μV. The advantage of novel Vernier delay line ADC is flexible. We can adjust the measurement range and resolution according to the measurement requirements.

參考文獻


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