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  • 學位論文

低溫度係數之能隙參考電壓電路設計

Design of Bandgap Voltage Reference Circuit for Low Temperature Coefficient

指導教授 : 黃正清
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摘要


本論文主要內容為設計一個供應電壓可操作在 1.3 V 的能隙電壓參考 (bandgap voltage reference) 電路。主要是設計一個電路,藉由正比於溫度的電路 (PTAT) 去補償雙載子電晶體的所產生的負溫度係數。利用溫度係數互補的電流相加及選取適當運算放大器輸入電壓節點的方式,目的在不使用複雜的低電壓運算放大器而改進傳統的線性能階差參考電壓產生的電路。此電路的輸出參考電壓為 554 mV ,而且其電壓值可藉由電阻值而改變,如此可以改善傳統能隙電壓參考電路輸出電壓固定是 1.25 V 而無法低於 1 V 的問題。此電路的溫度係數為 0.68 ppm/C ,證明輸出電壓幾乎不受溫度的影響。此電路是選用台積電 0.35微米、一層poly、四層metal、互補式金氧半 (CMOS) 製程。

並列摘要


The objective of this work is to design a bandgap voltage reference circuit that can be operated with 1.3 V of supply voltage. The main work is to design a circuit that utilizes a PTAT (proportional to absolute temperature) to compensate the negative temperature coefficient resulting from BJT. We use the ways of the sum of two currents which temperature coefficients are compensated and the suitable input voltage nodes of opamp. We do not use a complex low-voltage opamp and can improve the conventional linear bandgap voltage reference generator circuit. The output reference voltage is 554 mV, and it can be changed by the resistance. Therefore, this circuit can improve the problem of the fix output voltage of 1.25 V in the conventional bandgap voltage reference circuit. The temperature coefficient is only 0.68 ppm/C, and it can prove that the output voltage almost would not be affected by the temperature. Our circuit is fabricated by TSMC 0.35 um 1P4M CMOS process.

參考文獻


[1] Robert A. Pease, “The design of band-gap reference circuits: trials and tribulations,” IEEE 1990 Bipolar Circuits and Technology Meeting, pp. 214-218, Sept. 1990.
[2] Germano Nicollini and Daniel Senderowicz, “A CMOS bandgap reference for differential signal processing,” IEEE Journal of Solid-State Circuits, vol. 26, no. 1, pp. 41-50, Jan. 1991.
[4] David A. Johns and Ken Martin, Analog Integrated Circuits Design, John Wiley and Sons, Inc., 1997.
[5] Marco Ferro, Franco Salerno, and Rinaldo Castello, “A floating CMOS bandgap voltage reference for differential applications,” IEEE Journal of Solid-State Circuits, vol. 24, no. 3, pp. 690-697, June 1989.
[6] Phillip E. Allen and Douglas R. Holberg, CMOS Analog Circuit Design, Saunders College Publishing HBJ, 2002.

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