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  • 學位論文

適用於正交分頻多工通信系統的可變長度傅利葉轉換器之設計與研究

Investigation and Design of a Variable Length FFT Processor for OFDM Communication Systems

指導教授 : 林登彬
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摘要


本篇論文主要提出一個適用於正交分頻多工通信系統的可變長度快速傅利葉轉換器。我們是利用管線結構,用radix-2/4/8演算法來有效的減少所需要的乘法次數,並採用定點數計算技巧及八分之一週期的正弦和餘弦函數值來存取轉換因子, 以減少晶片所需要的面積及消耗的功率。 此種可變長度管線結構之快速傅利葉轉換處理晶片可以被使用在802.11a,數位廣播系統、數位視訊地面廣播系統、非對稱式數位用戶端迴路系統和高速數位用戶端迴路系統上,可處理64點到8192點的OFDM系統架構電路。最後我們透過Xilinx XC2V 1000 FG456 來實現radix-2/4/8 快速傅利葉轉換器,並用邏輯分析儀來驗證結果。

並列摘要


This paper proposes a variable length FFT processor for Orthogonal Frequency Division Multiplex(OFDM) communication systems. We use radix-2/4/8 algorithm in pipelined architecture, which can effectively minimize the number of complex multiplications. Due to radix-2/4/8 algorithm has regularity. So, it is easy to be implemented in VLSI, especially in a pipelined architecture. Besides, in order to reduce the required chip area and power consumption, we need fixed-point arithmetic, and twiddle factors are stored one-eighth period sine and cosine ROM . Based on this architecture, a variable- length FFT is designed for use in the 802.11a DAB, DVB-T, ADSL and VDSL applications. It can deal with 64 to 8192 points FFT. Finally, The chip we used is Xilinx XC2V 1000 FG456 which achieve radix-2/4/8 FFT architecture, we also use the logic analyzer to verify our simulation result.

參考文獻


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[5] Jun-Jie Fang, Design of FFT Processor, NCTU, Master Thesis, August 2001.
[6] P. Dunamel, H. Hollmann, “Split Radix FFT Algorithm,” Electronics Letters 5th Vol. 20 No. 1, January 1984.
[7] D. Takahashi,”An extended split-radix FFT algorithm,” IEEE Signal Processing Letters, Issue. 5, Vol. 8, pp.145-147, May 2001.

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