混合式多處理機系統可程式度之改善

多處理機系統的可程式度對於程式設計者而言，是個普遍面臨到的重要議題。使用多核心處理器的運算節點所連結而成的叢集電腦，是一個包含訊息傳遞與記憶體分享架構的混合式多處理機系統，而這樣的系統也將會隨著多核心處理器的流行越顯普遍。本篇論文提出了在混合式多處理機系統下的可程式度改善之方法。論文中提出了一套以SUIF為基礎的編譯系統，能將使用C程式語言所撰寫的循序式程式轉換成適用於混合式多處理機系統下進行平行處理的程式。而最後的實驗結果，也顯示出此套編譯系統的可運行性並能提升程式執行的效能。此篇論文也提出了一個加強型MPICH 多重通訊協議裝置，可以增進此裝置在分享式記憶體通訊模式下的頻寬表現。

關鍵字

MPICH 多重通訊協議裝置； SUIF編譯系統；多處理機系統；多核心處理器；叢集電腦；混合式多處理機系統；訊息傳遞

並列摘要

The programmability of a multiprocessor system is generally recognized to be the major issue confronting designers. A PC cluster with multi-core computing nodes to form a hybrid multiprocessor system, which consists of both message passing and shared memory multiprocessing architectures in the system, will become popular. This thesis presents software methodologies for improving the programmability of a hybrid multiprocessor system. The proposed SUIF-based compiler system has been built to transform the sequential program, written in C programming language, for running on a hybrid multiprocessor system in parallel. The experimental results show that the proposed compiler system is workable and a better system performance can be achieved. Moreover, an enhanced MPICH multi-protocol device has also been proposed, and it can improve the bandwidth when using the MPICH multi-protocol device with shared memory communication mode.

並列關鍵字

MPICH multi-protocol device ； SUIF compiler system ； multiprocessor system ； multi-core processor ； PC cluster ； hybrid multiprocessor system ； message passing

參考文獻

[3] B. Wilkinson and M. Allen, Parallel Programming: Techniques and Applications

Using Networked Workstations and Parallel Computers, Prentice Hall PTR, NJ,

[4] Seema Hiranandani, Ken Kennedy, and Chau-Wen Tseng, “Compiling Fortran D for MIMD distributed-memory machines,” Communications of the ACM, Vol. 35, No. 8 (Aug. 1992), Pages 66-80.

[5] High Performance Fortran Language Specification Version 1.0, May 1993.

[6] The Message Passing Interface (MPI) standard, http://www-unix.mcs.anl.gov/mpi/

國際替代計量

混合式多處理機系統可程式度之改善

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