柔性啟動之降壓直流轉換器設計

BUCK CONVERTER WITH SOFT START

江泙興(Ping-hsing Chiang)

指導教授 ： 黃淑絹

大同大學/電機資訊學院/電機工程學系所/碩士(2007年)

摘要

本論文設計一具柔性啟動之降壓直流轉換器，並採用TSMC 0.35µm CMOS製程來作模擬。 整個電路是依據Lee及Mok [1]所提出之PWM電流模式直流電壓轉換器架構而設計的。此外，我們增加了柔性啟動電路，以避免電路在一開機時，因突波電流而造成電路損毀。模擬結果顯示，針對以電池供應在3V到5V為主的應用產品，此電路可操作在頻率300kHz到1MHz。在採用外部零件電容10-µF及電感4.7-µH的情況下，其輸出漣波電壓為20mV。此電路在供給電壓3V及負載電流200mA的狀態下，有最大功率效能94%。 line及load regulations分別約為0.24mV/mA及73.6mV/V。在典型輸出電壓為1.8V下，加入柔性啟動電路，可以將電源開啟時的峰值電感電流從1.14A減少到 749mA，因而證明該電路是有作用的。

關鍵字

降壓直流轉換器

並列摘要

A bulk DC-DC converter with soft start has been designed and simulated with TSMC 0.35µm CMOS models. The overall circuit is designed based on a current-mode PWM controlled converter proposed by Lee and Mok [1]. In addition, a soft-start circuit is added to avoid the instant surging current breaking down the circuit. Simulation results show that this converter with on-chip current sensor can operate from 300 kHz to 1 MHz with supply voltage from 3 to 5 V suitable for battery supply applications. The output ripple voltage is about 20 mV with a 10-µF off-chip capacitor and 4.7-µH off-chip inductor. The maximum power efficiency is 94% at load current 200mA and supply voltage 3V. The line and load regulations are 0.24mV/mA and 73.6mV/V, respectively. With a soft-start circuit, the peak inductor current at power-on is reduced from 1.14A to 749mA for an output of 1.8V. It proves that the circuit of the soft start is effective.

並列關鍵字

BUCK DC TO DC CONVERTER

參考文獻

[1] C. F. Lee and P. K. T. Mok, “A monolithic current-mode CMOS DC–DC converter with on-chip current-sensing technique,” IEEE Journal of solid-state circuits, vol. 39, no. 1, Jan. 2004.

[8] M. Brown, Practical Switching Power Supply Design, New York: John Wiley & Sons, 1990.

[9] C. Deisch, “Simple switching control method changes power converter into a current source,” in Proc. IEEE Power Electronics Specialists Conf., 1978, pp. 300–306.

[10] S. Hsu, A. Brown, L. Rensink, and R. Middlebrook, “Modeling and analysis of switching Dc-to-Dc converters in constant frequency current programmed mode,” in Proc. IEEE Power Electronics Specialists Conf., 1979, pp. 284–301.

[11] P. E. Allen and D. R.Holberg, CMOS Analog Circuit Design, 2nd ed., Oxford Univ. Press, 2002.