Recently, Internet and wireless communication has been highly developed, and the security of information for example in WiMAX and 3G communication are more becomes more important. Elliptic curve (EC) cryptosystem (ECC) is one of the effectively public key cryptography systems. It is based on the difficulty to solve the discrete logarithm problem over the points on an elliptic curve. When ECC compared with other existing public key cryptosystems, the key size is smaller than other cryptosystems in equal security level. In the thesis, we propose five different design of fast EC multiplier based on the parallel NAF and SD2 conversion, and then use these design to develop a fast parallel ECC processor. The contribution of paralleling operation used in the proposed designs improves the computing speed of ECC processor significantly. Finally, we verify the high performance of our ECC processor by the simulation using FPGA simulation tools and C++ language.