矽深蝕刻技術在微機電系統的應用

Deep Silicon Etching Technology and Its Application to MEMS

鍾震桂(Chen-Kuei Chung)

《光學工程》 72期 (2000/12) Pp. 30-38

https://doi.org/10.30011/OE.200012.0004

摘要

本文利用感應耦合電漿(ICP)的交替蝕刻與鈍化方法，開發出矽深蝕刻製程技術，包括深覓比＞30的深溝漕，垂直度＞89.9°；與蝕刻深度＞500μm的晶片穿透蝕刻，蝕刻速率可達3.5μm/min。同時也將介紹ICP與其他製程結合可發展的ICP LIGA-like和SCREAM-like製程技術。

關鍵字

感應耦合電漿 ； 矽深蝕刻 ； 穿透蝕刻 ； 非均向性 ； 深寬比 ； 選擇比

並列摘要

We have demonstrated the very high aspect ratio silicon trench with profile angle ＞89.9° and through wafer etching by inductively coupled plasma (ICP) etching. The silicon trench with aspect ratio more than 30 and nearly vertical sidewall were basically fabricated by STS ASETM technology and controlled at proper process parameters. In combination with other processes, ICP LIGA-like and SCREAM-like technology will be introduced and developed.