隨著時代的演進,現代社會在生醫領域的研究日趨重視,而長時間在人體表皮層下的生醫探測人體狀況的晶片也漸漸被需要,而類比記憶體常出現在生醫晶片中,用來記錄長時間晶片學習記錄人體情況的結果.
此研究的主要目標是在標準0.35微米互補型金氧半製程下,設計出聰明可動態雙向線性調適的高解析非揮發性類比記憶體,而設計方向則是側重雙向調適,線性,高解析度,操作簡易,快速完成寫入,並觀測其在長時間常態溫度下記憶體儲存的有效時間常度.
研究中從以HSPICE建構能夠模擬出熱電子熱電洞特性的合理模型,進而模擬類比記憶體的電路特性,以此條件下模擬設計出電壓型可雙向線性調適,並具有超過8位元解析度的類比記憶體.再經由下線後得到量測晶片的量測數據與HSPICE電路模擬結果做比較,檢測晶片之特性是否符合HSPICE模擬的結果.
當記憶體單元的特性量測結果與模擬情況符合後,就接續著模擬並下線記憶體陣列晶片,設計以及量測針對此電壓型雙向線性調適非揮發性記憶體的陣列,用以驗證個別記憶體單元間寫入是否會彼此干擾的情況,並在此晶片量測寫入速度加快的結果是否符合預期結果.最後則是做資料保存(data-retention)的量測,記憶體儲存值以儲存三個月以上為目標時間,藉由資料保存相關理論以實驗數據求得長時間的記憶體儲存值情況.並且改善加快寫入速度.當資料保存量測與理論驗證後,接著研究方向朝陣列架構的電路模擬與下線.
最後,隨著研究過程的推進,各式各樣的問題以及現象隨之浮現,在本研究的最後部分會提出並給予一些想法與解決情形來討論總結.

Floating-gate devices have been widely used in many commercial products as memory cells. In this paper, a bidirectionally-programmable non-volatile analog storage cell has eight effective resolutions to write or erase information. The memory cell, which stores the analog information in the MOS transistor floating-gate device, is written and erased by means of hot-electron injection and hot-hole injection. The memory circuit can write or erase the target value to the floating-gate devices and it is achieved by a simple, on-chip comparator. By using a comparator, the circuit controls the programming mechanisms automatically that the storage analog information can be programmed to the target value precisely under negative feedback. Errors due to the effects of device mismatches or trapping can be eliminated by the feedback control. By modeling the programming mechanisms, the proposed analog memory circuit is designed and can be used in analog neural networks. The proposed analog memory circuit has the storing voltage range from 0.6V to 2.2V and the error voltage less than 5mV. In this experiment, data-retention should be tested after the design of the memory cell was finished. the data-retention test results can be used to estimate the storage time in which the memory cell holds the storage information. In the end, a memory-cell array is designed by using floating-gate technique to store analog information.

摘要………………………………………………………………… ii
致謝…………………………………………………………………iii
Contents……………………………………………………………iv
List of figures……………………………………………………vi
List of tables……………………………………………………ix
1 導論
1.1 研究動機…………………………………………………………2
1.2 研究目標…………………………………………………………3
1.3 研究貢獻評估……………………………………………………4
1.4 章節簡介…………………………………………………………4
2 相關文獻回顧
2.1 熱載子注入………………………………………………………7
2.1.1 通道熱電子注入………………………………………………7
2.1.2 通道熱電洞注入……………………………….……………9
2.1.3 離子化熱電子注入…………………………………………10
2.1.4 離子化熱電洞注入……………………………………………11
2.2.1 多準位記憶體…………………………………………………12
2.2.2 自我收斂平衡電流型的儲存記憶體…………………………14
2.3 高解析度記憶體的機制…………………………………………16
2.4 搭配熱載子注入做雙向線性調適記憶體的方法………………18
2.5 HSPICE 電流模擬熱載子注入模型……………………………21
2.5.1 製程參數萃取…………………………………………………22
2.5.2 HSPICE 閘極電流模擬熱載子注入模型………………………23
2.5.2.1 NMOS 的閘極電流熱載子注入趨近模型……………………24
2.5.2.2 PMOS 的閘極電流熱載子注入趨近模型……………………26
2.5.3 熱載子注入模型討論與總結……….…………………………29
2.6 資料保存…………………………………………….……………30
2.6.1 溫度加速化測試…………………………………….…………31
2.6.2 電壓加速化資料保存測試…………….………………………34
2.7 記憶體陣列…………………………………….…………………34
2.8 總結………………………………………………………………35
v
3 雙向線性調適寫入類比記憶體
3.1 電路設計的概念由來與步驟………………….……………38
3.2 記憶體單元……………………………………………………39
3.3 遲滯比較器的雙向線性調適類比記憶體……………………41
3.3.1 運用遲滯比較器的模擬情況………………………………47
3.4 遲滯比較器配合PWM控制的雙向線性調適類比記憶體………50
3.5 誤差比較器的雙向線性調適類比記憶體……………………52
3.5.1 運用誤差比較器的類比記憶體的模擬情形………………55
3.6 加強電洞注入型雙向線性調適的非揮發性類比記憶體……57
3.6.1 加強電洞注入的非揮發性類比記憶體的模擬情形…………59
3.7 總結………………………………………………………………61
4 類比記憶體單元模擬與量測
4.1 雙向線性調適記憶體下線晶片介紹……………………………64
4.2 運用遲滯比較器的類比記憶體的量測結果……………………66
4.3 運用誤差比較器的類比記憶體的量測結果……………………69
4.4 加強電洞注入的非揮發性類比記憶體的量測結果……………72
4.5 總結………………………………………………………………75
5 雙向線性調適寫入類比記憶體陣列
5.1.1 記憶體陣列電路架構…………………………………………79
5.1.2 加強電洞注入型類比記憶體單元……………………………82
5.2.1 記憶體陣列模擬情形…………………………………………83
5.2.2 記憶體陣列佈局介紹………………………………………84
5.2.3 記憶體陣列量測結果…………………………………………86
5.3 資料保存(Data-retention)……………………………………92
5.4 總結………………………………………………………………96
6 總結
6.1 研究貢獻…………………………………………………………97
6.2 未來展望與討論…………………………………………………98

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