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作者(中文):羅正岳
作者(外文):Cheng-Yueh Lo
論文名稱(中文):H.264/AVC去方塊效應濾波器之平行處理架構設計
論文名稱(外文):Architecture Design of Parallel-processing Deblocking Filter in H.264/AVC
指導教授(中文):陳永昌
指導教授(外文):Yung-Chang Chen
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電機工程學系
學號:923988
出版年(民國):95
畢業學年度:94
語文別:英文
論文頁數:53
中文關鍵詞:去方塊效應濾波器H.264/AVC
外文關鍵詞:deblockingfilterH.264/AVC
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在我們日常生活中,數位影像總是扮演著很重要的角色,譬如電視,電腦螢幕,手機以及,掌上型電玩等,這些電器設備都需要用影像去顯示它們的功能,所以影像的技術變的越來越重要,從以前到現在,很多的視訊處理標準都被提出來研究,舉比較有名的幾個例子,MPEG-2,MPEG-4,H。263和H。264/AVC,它們對於影像的效能都有很優越的表現,尤其在他們其中H。264/AVC是近來常被討論的一種標準。
H。264/AVC是最後一個在國際間被提出來的視訊標準,它有著很精準的圖形預測能力能維持影像經過預測之後依然有很好的品質而且還有很高的壓縮比率能夠減少傳輸所需要的剩餘資訊,也因為這些優點,所以他也被認為是目前最完善的視訊壓縮標準,比如說圖形內自我預測,整數點和四分之一整數點的圖形間預測,以及前後自我適應的二位元算術編碼,它們在影像的效能跟品質上都有很大的改善,但是,也因為它們精密複雜的演算法,由硬體來實現變得更加困難。
由於H。264是採用方塊模式去做影像的處理,所以在影像上面多少都會有不連續的情況發生,為了解決這個問題,在H。264/AVC的視訊標準裡面有一個功能方塊叫做去方塊濾波器,它主要的功能就是要將方塊之間做柔順的動作,使人的眼睛不容易發現這些方塊的不連續邊,這些動作是作用在當整個畫面重新組合之後,所以它會抓每張的資料近來做去方塊的動作,在將已經去方塊的資料存回整個影像上,這個重複存取的動作,假如要做及時影像,這個地方將會成為一個瓶頸,而且抓近來的影像資料存放的記憶體大小,對於電路的製作費用也是要被考慮到的。
在這篇論文裡面,我們提出一種新的架構給H。264/AVC的去方塊濾波器去使用,新的去方方塊的順序以及在同一時間做二維方向的去方塊動作被展示出來,我們使用兩個去方塊濾波器對垂直方向跟水平方向的邊界做重疊的動作,從外部記憶體抓進去方塊濾波器的影像資料能夠完全的被重覆使用,對於速度方面,有了很大的改善,以許我們的電路在資料處理方面的邏輯電路有點大,但我們只使用一個四個方塊大小的記憶體去做儲存的動作,整體來說,整個電路的面積不會比現有已經提出的架構大太多,但我們對於速度上面卻能改善許多,對於及時影像的實現,也有很大的貢獻。
In our daily life, digital video is always an important part for us. Among television, computer monitor, cell-phone and palm game player, these equipments all need video technology to display what they are showing. Especially video coding has become more significant. Some popular techniques of video coding, like MPEG-2, MPEG-4, H.263 and H.264/AVC, have great impact on video quality. Among them, H.264/AVC has been paid most attention recently.
H.264/AVC is the latest international video coding standard. It has precise manner of prediction and high compression rate that can achieve high visual quality and greatly reduce required bits in transmission. Because of its complex algorithm, it can achieve high performance. Like intra-prediction, integer-pixel and quarter-pixel motion estimation and context-adaptive binary arithmetic coding (CABAC), they have great improvement on video quality and compression. But due to its high complexity, the hardware VLSI implementation is very hard to be realized.
De-blocking filter is an important component of H.264/AVC to reduce the block artifacts. It filters the reconstructed frame to improve video quality of human visual perception. With accessing reconstructed frame data continuously, the processing speed has become one bottleneck for real-time application. Also, the memory usage beside the de-blocking filter for reducing cost needs to be concerned.
In this thesis, we propose a new architecture for de-blocking filter in H.264/AVC. New filtering order and overlapped bi-directional filtering will be presented. Two one-dimensional FIR filters are used for horizontal and vertical filtering. The pixel data can be fully reused. Maybe the logic area of the filter is larger, but for reducing the processing time and real-time application, our design may have real merits.
Abstract
Table of Contents i

Chapter1 Introduction 1
1.1 Motivation of This Work 2
1.2 Related Work 3
1.3 Thesis Organization 4

Chapter2 Overview of De-blocking Filter in H.264/AVC 5
2.1 What is Block Artifact 7
2.2 H.264 Video Coding Standard 7
2.2.1 Overall Architecture of H.264/AVC 8
2.2.2 Intra-Prediction 9
2.2.3 Inter-prediction 11
2.2.4 Transform and Quantization 12
2.3 De-blocking Filter in H.264/AVC 13
2.3.1 Block Edge Analysis 14
2.3.2 Boundary Strength 16
2.3.3 Filter Decision 18
2.3.4 Algorithm of De-blocking Filter 20

Chapter3 Proposed Architecture of De-blocking Filter 24
3.1 Previous Work 24
3.2 Proposed De-blocking Filter Architecture 25
3.2.1 Overview of Proposed Architecture 26
3.2.2 Filtering Order 27
3.2.3 Architecture of Parallel-Processing De-blocking Filter 28
3.2.4 Processing Schedule 36

Chapter4 Experiment Results 38
4.1 FPGA Emulation 38
4.2 VLSI Implementation 38
4.2 Comparison 39

Chapter5 Conclusion and Future Work 40

Reference 41

Appendix 43
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[5] S. D. Kim, J. Yi, H. M. Kim, and J. B. Ra, “A deblocking filter with two separate modes in block-based video coding,” IEEE Trans. Circuits Syst. Video Technol., vol. 9, pp. 156–160, Feb. 1999.

[6] Iain E G Richardson, “H.264 and MPEG-4 Video Compression”, John Wiley & Sons, 2003

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[8] Lingfeng Li, Satoshi Goto, and Takeshi Ikenaga “An Efficient Deblocking Filter Architecture with 2-Dimensional Parallel Memory for H.264/AVC”, Volume 1, 18-21 Jan. 2005 Page(s):623 - 626 Vol. 1, Asia South Pacific Design Automation Conference, 2005

[9] S. C. Chang, W. H. Peng, S. H. Wang and T. Chiang, “A Platform Based Bus-interleaved Architecture for De-blocking Filter in H.264/MPEG-4 AVC”, IEEE Int’l Conf. on Consumer Electronics, 2005.

[10] Bin Sheng1, Wen Gao Di Wu1, “AN IMPLEMENTED ARCHITECTURE OF DEBLOCKING FILTER FOR H.264/AVC” Volume 1, 24-27 Oct. 2004 Page(s):665 - 668 Vol. 1, IEEE International Conference on Image Processing

[11] G. Zheng, and L. Yu, “An Efficient Architecture Design for Deblocking Loop Filter”, Picture Coding Symposium, 2004

[12] Tsu-Ming Liu, Wen-Ping Lee, Ting-An Lin, Chen-Yi Lee,“A memory-efficient deblocking filter for H.264/AVC video coding” 23-26 May 2005 Page(s):2140 - 2143 Vol. 3, IEEE International Symposium on Circuits and Systems, 2005

[13] M. Sima, Y. Zhou and W. Zhang, “An efficient architecture for adaptive de-blocking filter of H.264/AVC”, IEEE Trans. on Consumer Electronics, vol. 50, no. 1, pp. 292-296, 2004.

[14] C. C. Cheng and T. S. Chang, “A hardware efficient deblocking filter for H.264/AVC”, IEEE Int’l Conf. on Consumer Electronics, 2005.

[15] Shen-Yu Shih, Cheng-Ru Chang and Youn-Long Lin, "A Near Optimal Deblocking Filter for H.264 Advanced Video Coding," IEEE/ACM Asia-South Pacific Design Automation Conference, Yokohama, Japan, January 2006.

[16] Cheng, C.-C. Chang, T.-S. Lee, K.-B. ,”An In-Place Architecture for the Deblocking Filter in H.264/AVC” IEEE Circuits and Systems Society 2006.

[17] JVT H.264/AVC Reference Software JM 8.4
 
 
 
 
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