本論文計畫書主要以研究電容式用於慣性感測中的微型陀螺儀系統後段之感測電路為主，由於所感測的電容訊號極微小(約為10-15F)，故需要一能抵抗雜訊、高準確度的電路系統來作感測。計畫書中說明四種常見的感測電路，並且說明電路上的不理想特性及來源，以及如何改善，經由分析後，我們選擇以差動輸出的方式作為微電容感測電路的架構，原因是此架構可以消除共模的雜訊，又由於差動式輸出的電容感測電路架構簡單，沒有開關切換時電荷注入所產生的誤差，且藉由差動的方式可以將雜散電容給消除。並且加入的共模回授電路，可將輸出共模位準拉回設計值，回授作用下，漸漸回到平衡狀態，並且其值大約在1.4V。
而經由HSPICE電路模擬得知所設計的電路其輸出增益為4.6mV/fF，總輸出雜訊約為2.2232mV，故可以得知電路最小可感測的電容值解析度約為0.48fF。而設計二的電路經HSPICE模擬得到輸出增益為70.48mV/fF，總輸出雜訊約為2.8906 mV，故可以得知電路最小可感測的電容值約為41aF。

目錄
誌謝 I
摘要 II
目錄 III
圖目錄 VI
第1章 緒論 1
1.1 研究背景 2
1.2 研究動機與目的 5
第2章 微型陀螺儀系統之感測原理 7
2.1 振動式陀螺儀感測原理 7
2.1.1 運動理論分析 8
2.2 微型陀螺儀系統架構 14
2.2.1 Sigma-Delta架構簡介 15
2.2.2 微陀螺儀使用Sigma-Delta之架構 16
2.3 微型環狀陀螺儀結構 19
2.3.1 元件介紹 19
第3章 微電容感測電路 23
3.1 前言 23
3.2 文獻回顧 23
3.2.1 同步偵測(Synchronous Detection)電路, 截波穩定(Chopper Stabilization, CHS) 24
3.2.2 切換式電容(Switched-Capacitance)感測電路 27
3.2.3 相關雙取樣（Correlated Double Sampling）電路[19] 29
3.2.4 差動式（Pseudo-Differential）輸出電容感測電路 31
3.3 電路的非理想特性 33
3.4 電容感測式電路的誤差 34
3.4.1 放大器的抵補電壓(Amplifier Offset Voltage) 34
3.4.2 放大器1/f雜訊 35
3.4.3 開關誤差(switching error) 35
3.4.4 開關KT/C雜訊 37
3.5 放大器熱雜訊最佳化 37
第4章 全差動式感測電路設計 41
4.1 前言 41
4.2 微電容感測電路設計一 41
4.2.1 系統電路架構 42
4.2.2 兩級式全差動運算放大器設計 44
4.3 微電容感測電路設計一電路模擬結果 46
4.3.1 微電容感測電路設計一電路佈局 54
4.3.2 微電容感測電路設計一測試考量以及測試結果 55
4.4 微電容感測電路設計二 61
4.4.1 訊號增益級 61
4.4.2 微電容感測電路設計二電路模擬結果 63
4.4.3 微電容感測電路設計二電路佈局 68
第5章 結論 70
第6章 未來工作 71
參考文獻 72

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