本實驗中，我們使用射頻磁控濺鍍法沈積ZrO2及La2O3薄膜，這兩種薄膜有高介電常數（□r= 25□30）、低的漏電流密度、高崩潰電場（3□6 MV/cm）及高熱穩定度等優點。在電容器方面，我們對ZrO2薄膜做了依時性介電崩潰的分析，探討了偉伯斜率、面積比例等因素。對應於厚度分別為20 和7.5 nm的ZrO2薄膜，萃取出的偉伯斜率分別為1.4和1.1，得到的偉伯斜率跟文獻上發現的結果相近，同樣偉伯斜率跟厚度沒有關係。低偉伯斜率可以解釋為ZrO2材料的依時性介電崩潰是由異質崩潰所主導，即由於薄膜製程不完美，過程中留下弱點(weak defect)的原故，造成崩潰時間分布較分散，偉伯斜率數值較小。考慮十年生命期的預測，我們的數據顯示E-model 能描述較好。對於ZrO2厚度20 nm，面積大小3.14x10-4 cm2的電容器，由E-model 預測十年最大可操作電壓在溫度25到150 ℃的範圍內，為-2.3 V到-0.8 V。活化能(Ea)跟氧化層電場(Eox)可以線性關係表示為Ea = -1.04 Eox+0.773,而場加速因子(γ)跟溫度不相關。
我們成功地製作了N通道的金屬（Al）/氧化層（ZrO2或La2O3）/半導體（p-Si）場效電晶體，元件顯示正常的電晶體特性。為了探討電壓與溫度造成場效電晶體臨界電壓的漂移現象，我們針對電晶體的可靠度課題，作了PBTI（Positive bias temperature instability）量測及探討。結果發現元件在PBTI 的偏壓下，不管是使用ZrO2或La2O3薄膜，臨界電壓隨時間都往負的方向移動，且臨界電壓偏移量對時間的關係遵守冪次關係（power law）。相同的薄膜在兩種溫度條件（25 ℃ and 75 ℃）的實驗數據，顯示有相同的趨勢，即用ZrO2電晶體的臨界電壓退化現象主要是由介面缺陷所主導，而用La2O3電晶體的臨界電壓退化現象主要是由氧化層內部捕獲電荷所主導。

Metal-insulator-semiconductor (MIS) capacitors and n-channel field effect transistors with ZrO2 and La2O3 gate dielectrics were successfully fabricated. The reliability issues such as time dependent dielectric breakdown (TDDB) and static positive bias temperature instability (PBTI) have been discussed. In the TDDB section, the Weibull slope and area scaling factors of ZrO2 gate dielectric have been investigated. The extracted Weibull slope (β) for different thickness of 20 nm and 7.5 nm is found to be 1.4 and 1.1, respectively. The TDDB data are better described by the E-model. The maximum operation voltage range for ten-year lifetime of capacitors with an area of 3.14x10-4cm2 and thickness of 20 nm was projected to be about -2.3V to -0.8V in the temperature range from 25 to 150 ℃. The relation of activation energy (Ea) and oxide field (Eox) is given by Ea = -1.04 Eox+0.773. The field acceleration factor (γ) is shown to be independent with temperature in our study.
The PBTI characteristics of NMOSFETs with ZrO2 and La2O3 gate dielectrics have been examined. Both oxide-trapped and interface-trapped charges can contribute to threshold voltage (Vt) shift. The Vt degradation of ZrO2-gated MOSFETs is mainly caused by interface-trap charges, but that for La2O3-gated MOSFETs is mainly caused by oxide-trapped charges. This trend is found to be true at temperatures 25 and 75℃. The Vt shifts negatively and Vt degradation versus time follows a power law relation.

目 錄
第一章 緒論………………………...............................................................1
1.1高介電常數（High-κ）薄膜於極大型積體電路（ULSI）的發展…......…....1
1.2 High-κ薄膜在DRAM上的應用…………………………………...……..2
1.3 High-κ薄膜於MOSFET閘極氧化層（Gate Oxide）的發展.......................3
1.4 High-κ薄膜的製備方法………………………………………......………4
1.5 本論文的研究方向…………………………………………..……………4
第二章 氧化鋯（ZrO2）及氧化鑭（La2O3）薄膜元件的製備…...…6
2.1 射頻磁控濺鍍法（RF Magnetron Sputtering）的簡介.................................6
2.2 歐姆接面（Ohmic contact）的製備……………………….....…………….7
2.3 ZrO2及La2O3薄膜的成長………...………………………..……………..7
2.4 ZrO2及La2O3薄膜電容器的製備……………………………….………..8
2.5 ZrO2及La2O3薄膜電晶體的製備………………………….……………..9
2.6 量測儀器以及實驗儀器介紹……………………………………………11
第三章 熱穩定性（Thermodynamic Stability）之探討……....…...12
3.1 「熱穩定性」理論簡介…………………………………………....………12
3.2 矽化物（Silicide）及矽酸鹽（Silicate）的產生…………........……………13
3.3 其他相關文獻……………………………………………………………14
第四章 ZrO2 及La2O3薄膜基本介紹及物性量測分析….......…. 15
4.1 ZrO2及La2O3薄膜的基本介紹………………………………..…….…..15
4.2 二次離子質譜儀（SIMS）縱深分佈之分析……………….....…………..16
4.3 X-Ray 繞射分析………………………………………………………...17
4.4 X-Ray光電子能譜儀(X-Ray photoelectron spectroscopy, XPS)之分析.18

第五章 Al/ZrO2/Si 與Al/ La2O3/Si電容器基本電性及漏電流機
制分析…………………………………………...……………...20
5.1電容-電壓(C-V) 特性曲線量測……………………………..…………20
5.2電流-電壓（I-V）特性曲線量測…………………………....….…………20
5.3 漏電流傳導機制之簡介…………………………………………………21
5.3.1 蕭基發射（Schottky emission）………………………....………….22
5.3.2 普爾-法蘭克發射（Poole-Frenkel Emission）…………....………...23
5.3.3傅勒-諾德翰穿隧(Fowler-Nordheim Tunneling)…………………24
5.3.4 歐姆傳導（Ohmic Conduction）…………………………………24
5.3.5空間電荷限制電流(space charge limited current, SCLC)………..25
5.4 MIS結構電容器與溫度變化之漏電流傳導機制分析………………...27
5.5 本章結論…………………………………………………………………29
第六章 Al/ZrO2/Si電容器可靠度分析……………………………...30
6.1閘極氧化層之崩潰電壓…………………………………………………30
6.2韋伯分布及韋伯斜率( Weibull slope )的探討…………………………31
6.3韋布斜率(β)與氧化層面積的關係………………………..…...……….32
6.4韋布斜率(β)與氧化層厚度的關係………….………………..………...33
6.5依時性介電崩潰(TDDB)的分析……………….………………….…...34
6.6本章結論……………….………………………………………………...37第七章Al/ZrO2/Si與Al/ La2O3/Si場效電晶體基本電性及電壓及
溫度引致元件參數不穩定性(PBTI)之研究………………………38
7.1 IDS-VDS Curve的特性探討………………………………………………38
7.2 IDS-VGS Curve的特性探討………………………………………………39
7.3 次臨界斜率（Sub-threshold Swing）…………………………………..39
7.4 臨界電壓（VT）的粹取…………………………………………………40
7.5遷移率（Mobility）的探討……………………………………………..41
7.6 電壓與溫度引致場效電晶體元件參數不穩定性之探討……………………………………………………………..………………44
7.7 本章結論…………………………………………………………………49
第八章 結論……………………………………………………………….50
參考文獻……………………………………………………………………52
實驗圖表……………………………………………………………………57
附錄…………………………………………………………………………114

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