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作者(中文):吳政憲
作者(外文):Wu, Cheng Shien
論文名稱(中文):奈米碳管微電極陣列之可調變式電壓或電流訊號神經細胞刺激電路
論文名稱(外文):Voltage-mode and current-mode neural stimulation circuits for carbon-nanotube-coupled microelectrode array
指導教授(中文):陳新
指導教授(外文):Chen, Hsin
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電子工程研究所
學號:9663561
出版年(民國):99
畢業學年度:98
語文別:英文
論文頁數:91
中文關鍵詞:微電極陣列奈米碳管軌對軌放大器功率放大器數位類比轉換器刺激電路
外文關鍵詞:MEACNTrail to rail amplifierpower amplifierdigital to analog converterstimulator
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為了要研究細胞間的訊號反應,本篇論文用奈米碳管(CNT)當做電極,作為與細胞間的介面,奈米碳管本身具有較小的介面阻抗,較適合用來做刺激。微電極陣列系統可以記錄與刺激細胞,達到雙向溝通的能力,作為長時間來使用的話,研究上指出可以有效觀察細胞間的反應訊號。傳統上研究多半以金、銀或其他金屬當做電極,紀錄或者刺激主要都倚靠外接儀器來做分析,本篇論文主要所提出的是可以取代外接儀器,直接與奈米碳管整合成可植入式生物體晶片,由電腦直接輸入參數,設定刺激參數給刺激晶片,晶片會轉出使用者設定的波形輸出,此方法能有效且簡單定義出使用者想輸出的波形,方便未來整合成大的微電極陣列研究。
奈米碳管與水溶液介面雖然接觸特性較佳,但對於電路設計而言是一個相當大的負載,且負載會隨著頻率改變造成設計上的困難。此系統可以選擇要用電壓刺激或者電流刺激,電壓刺激與電流刺激的差異在於,電壓刺激定義是輸出到電極的電壓可以由使用者控制但是輸出電流的大小不確定,因為輸出端點的阻抗不是一個定值,電流刺激則是相反。當使用者經由外部電腦輸入一些參數,這些參數主要是定義刺激訊號的大小、波形、工作週期、頻率和刺激位置的選擇,因此,此系統不像前人所設計的一個一個訊號經過數位類比轉換器轉換,速度上會差很多。當所有參數都設定好之後,傳輸送到數位晶片上,數位晶片在把值採用序列輸入與輸出(serial in and out)方式傳送到下一級處理,經由數位類比轉換器可以控制輸出波形的大小、計數器可以控制波形的工作週期和頻率,推動負載的緩衝級(buffer),可以選擇用軌對軌放大器或者功率放大器,利用軌對軌放大器可以產生全幅輸入與輸出,相對上可以產生較高的電壓輸出,緩衝器輸出接開關可以任意選擇我們想要的電極作刺激,經由我們所預先設定好的地流出,可以避免當紀錄訊號時產生過大的雜訊(artifacts)。
誌謝 I
中文摘要 II
Abstract IV
Table of Contents VI
List of Figures IX
List of Tables XIII
Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Contribution to Knowledge 3
1.3 Chapter Layout 4
Chapter 2 Literature Review 5
2.1 Electrophysiology of Neurons 5
2.2 Models of the Interface between CNT and Solution 7
2.3 Microelectrode Array System 10
2.3.1 Whole System Topology 10
2.3.2 Artifact Issue 11
2.3.3 Parallel Multiplexing Stimulation 12
2.4 Circuits for Neural Stimulation 14
2.4.1 Voltage Mode 14
2.4.2 Current Mode 17
2.5 Digital to Analog Converter 20
2.5.1 Ideal DAC 21
2.5.2 Static Characteristics of DACs 22
2.5.3 Decoder-based DAC 24
2.5.4 Binary-Weighted DAC 25
2.5.5 Thermometer Code DAC 27
Chapter 3 Design of the Voltage-Mode Stimulation Circuit 29
3.1 System Architecture 29
3.1.1 Digital Core 31
3.1.2 Pulse Generation Circuit. 31
3.2 Interface Model of CNT Electrodes 34
3.3 DAC & Stimulator 36
3.4 Design of a Rail-to-Rail Voltage Buffer 41
3.4.1 Circuit Floor Plan & Biasing Circuit 42
3.4.2 Input Stage 43
3.4.3 Ouput Stage 44
3.4.4 Nested Miller Compensation (NMC) 45
3.4.5 Simulations 47
3.5 Power Amplifier 52
3.5.1 Simplified Circuit Schematic & Offset Issues 53
3.5.2 Complete Circuit of the Low-Output Resistance Buffer 54
3.5.3 Simulations of the Buffer 56
3.6 Simulations of the Whole System 60
Chapter 4 Measurement Results of the Voltage-Mode Stimulation Circuit 63
4.1 Digital Core & Pulse Generation Circuit 63
4.2 DAC & H-bridge Inverter 65
4.3 Rail-to-Rail Buffers 68
4.4 Biological Measurement 73
Chapter 5 Design of the Current-Mode Stimulation Circuit 76
5.1 Current Stimulator of Cascode Amplifier 76
5.2 Measurement of the Current-Mode Stimulator 80
5.3 Comparison of Voltage & Current-Mode Stimulator 84
5.4 Chip Layout 86
Chapter 6 Conclusion and Future Work 87
6.1 Conclusion 87
6.2 Future Work 88
Reference 89
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