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作者(中文):張東隆
作者(外文):Chang, Thomas
論文名稱(中文):晶圓代工產業的雙螺旋策略
論文名稱(外文):Double Helix Strategy on Wafer Foundry Industry
指導教授(中文):丘宏昌
學位類別:碩士
校院名稱:國立清華大學
系所名稱:高階經營管理碩士在職專班
學號:9675515
出版年(民國):98
畢業學年度:97
語文別:中文
論文頁數:66
中文關鍵詞:晶圓代工能力移轉價值鏈能力鍵垂直範疇能力共演化雙螺旋
外文關鍵詞:Foundry DirectRe-targetingRe-brandingvirtual IDM
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在高脈動速度的產業, 潛在利潤和企業能力鍵常是考慮企業垂直整合範疇的因素, 特別是面臨劇烈競爭, 景氣不明, 產品生命週期極短, 高脈動速度的電子產業。

半導體產業經過1960年到2000年約16%的高年成長之後, 產業的成長速度漸漸緩慢下來, 預估2000年至2010年的年成長率約6%。1985年到2005年之間, 晶圓代工業的成長率高於半導體整體產業, 而達到約18%的高成長率。由於先進製程技術的研發以及先進晶圓廠的投資額非常龐大, 晶圓代工產業當然隨之邁入一個轉機: 以往晶圓代工的主要客戶(大於70%)為Fabless IC設計公司, 隨著高投資門檻時代(如32奈米, 22奈米)的來臨, 許多IDM元件整合大廠也難以應付高額的製程研發和建廠費用, 而被迫去考慮成為Fabless或輕量晶圓廠(下世代高額的研發及建廠費用將造成許多IDM大廠無法負擔此項研發費用的攤提以及建廠費用的折舊)。

另外, Fabless和晶圓代工目前緊密合作的成功搭配經驗, 也驗證了晶圓代工這個商業模式能夠快速敏捷反映市場, 並滿足供應鏈壓縮time-to-market的殷切需求。

從另一方面來說, IDM整合元件大廠今日仍然在大量, 單一產品線(如微處理器, 數位訊號處理器, DRAM, Flash)的生產上具有好的效率。此項高效率的來源出自IDM大廠在製程技術和產品設計的藍圖整合上有密切無間的同步工程配合, 其競爭優勢來自於IDM的製程技術能預知IC設計所需的enablers, 而將IC設計所需的製程及工廠參數(如IP, mask, PDK, DFM測試及封裝規格)同步及時提供給內部的IC設計工程團隊。所以IDM大廠的IC設計能夠縮短達到高良率的學習曲線。

為了縮短time-to-market同時誘使IDM走向輕量晶圓廠(Fab-light), 晶圓代工必須縮小和 IDM大廠在enabler準備上的落差(今日晶圓代工業的主要客戶仍是Fabless), 晶圓代工業者除了大舉投資先進晶圓產能和發展先進製程技術外必須強化晶圓代工所需〝互補力〞的投資。這些〝互補力〞能促成客戶的產品快速成功而導入量產。互補力就是要建立快速設計成功的生態環境和沃土, 包括IP, design libraries, EDA tool, DFM和堅實的設計服務。換句話說, 必須及時解決客戶快速成功的瓶頸。目前先進製程第一次就設計成功的瓶頸為〝設計生態環境〞。瞭解今日產業的競爭已進入供應鏈和另一個供應鏈之間的〝整合力〞競爭, 晶圓代工業者不能只專注其傳統核心競爭力(即製程技術和能準時達交的高良率生產以及先進晶圓產能) 。晶圓代工業者必須向IDM大廠看齊, 在DFM生態系統上去克服製程和設計之間的鴻溝。其中製程相關DFM資訊的完整及時提供更是高良率量產的基本要件。從供應鏈能力鍵的角度來看, 晶圓代工業者必須深入掌握上下游的技術, 特別是當製程技術邁入更先進平台之刻, 製程技術和設計技術的〝整合力〞成為晶圓代工業永續經營的最大挑戰和成功因素。晶圓代工業不僅提供先進製程的量產, 如何有效管理製程和設計〝齊奏〞(unison)的能力是晶圓代工業者能否快速量產下世代技術的成敗關鍵。

本論文討論半導體產業垂直整合與水平模組分工的脈絡變遷, 特別對晶圓代工業在潛在利潤和time-to-market的全盤考量之下, 必須強化〝幫助客戶快速成功〞所需的能力鍵(例如DFM, embedded memory, power efficiency, bandwidth, high precision analog等設計IC的enablers) 。這些不同專長的能力鍵在半導體的價值鏈的分佈各有專精。本論文討論晶圓代工產業垂直範疇的循環變遷和四種商業模式的演化軌跡。產業能力鍵的建立和範疇軌跡的擴大, 必須首先考慮不能和既有的客戶有所衝突(以符合晶圓代工企業目的, 價值觀和理念), 新的商業模式要能滿足(客戶和晶圓代工業之間)雙贏的長期夥伴關係。晶圓代工業在產業雙螺旋循環的過程中, 由於產業脈動速度加快, 在合久必分, 分久必合的演化過程中, 晶圓代工業者必須要能像IDM大廠一樣, 加快在〝IC設計生態環境〞的深耕。換句話說, 晶圓代工業為因應time-to-market快速學習曲線的要求, 必須縮小和IDM大廠在設計, 測試和封裝能力鍵的差異。在劇烈競爭的半導體產業, 領先者取得絕大部份的利潤, 在供應鏈與另一供應鏈競爭中, IC設計生態環境以及封測能力的落實是晶圓代工和其客戶能夠快速敏捷反應和勝出的基礎。

晶圓代工業者是個服務業, 服務業與製造業最大的不同是員工的心態。有了貼心同理心的心態後, 晶圓代工業者仍然必須從管理工廠管理/技術的範疇延展到管理價值鏈, 以提供強而有力並能快速動員的三維同步工程。經營客戶長期夥伴關係過程中, 更要串聯價值鏈的能力鍵去共同創造獨特的價值。

高脈動速度的電子產業, 企業的危機來自守成不變和缺乏對趨勢變化的快速反應能力, 這是因為高脈動速度產業只有〝快的打敗慢的〞而沒有〝大的打敗小的〞。快速應變能力鍵的轉移將在晶圓代工及半導體產業造成重大影響, 供應鏈成員必須快速串聯一系列〝短暫成員的優勢〞才能勝出。

不少IDM大廠和Fabless IC設計公司已經使用或漸漸採用晶圓代工的服務, 瞭解高脈動速度半導體產業結構變遷的軌跡以及先進製程產品開發的瓶頸和未來趨勢之後, 雙螺旋的啟示讓晶圓代工業者必須提供IC設計的enablers, 唯有共同營造和IDM一樣的IC設計生態環境, 晶圓代工業者才真正做到成為客戶的虛擬工廠。
As a study of the anatomy of organization of high clockspeed industry, the consideration of potential profit and capabilities are fundamentally intertwined in the determination of the vertical scope of the company. Turbulent and volatile markets of high clockspeed consumer electronics are becoming the norm as life-cycle shorten and global economic and competitive forces create additional uncertainty.

The growth rate of semiconductor industry is beginning to slow down where the yearly growth rate averaged 16% from 1960 to 2000 and the projected growth rate is around 6% from 2000 to 2010. The wafer foundry market is undergoing a transition, forcing more semiconductor companies to move towards fab-light or fabless strategies. This is because that the investment in new factories and the development of new technologies (such as 32nm, 22nm) is outpacing most companies’ financing resources. It is estimated that the growth rate of wafer foundry is around 18%, over the years 1985 to 2005.

The wafer foundry, fabless IC design and fab-light model will continue to survive and thrive, as the economic and technical factors that dictate the need to amortize the cost of technology development and fab ownership. Today, fabless design companies together with foundry have demonstrated the agility and speed to satisfy their customers in the supply chain.

Integrated device manufacturers (IDM’s), on the other hand, continue to be cost-efficient to meet high-volume (such as microprocessor, DSP, DRAM, Flash) or high-variety (such as analog) market. IDM cost-efficiency comes from tightly aligned technology/product roadmap, leading-edge capacity and in-house resource to have seamless intertwine among process technologies, product development and other “enabler” infrastructure such as IP, mask, physical design kits, design tool, test and assembly.

To shorten the time-to-market for of new product introduction and to couple with the emerging trend of fab-light strategy of IDM’s (major customers of foundry are fabless design companies today), wafer foundry providers have to become the complementors of their customers and invest heavily on advanced capacity, deliver optimized process technologies together with the fast deployment of robust IP, design libraries, EDA tool, design service and DFM (design for manufacturability) design ecosystem. Design ecosystem is becoming the bottleneck of advance product introduction in semiconductor industry where the competition is mainly between supply chains. The readiness of DFM ecosystem will help to close the gap between fabless designers and IDM designers, who have access to DFM information from their own fabs. Wafer foundry providers have to upgrade their capability to master the upstream and downstream capability, in other words, design ecosystem rather than merely wafer manufacturing will become one of key success factors for wafer foundry industry. Leading edge technologies urgently need the process-design integration where a structured concurrent process/design development is a must.

The importance of time or speed as a competitive weapon has been recognized for some time, the high risk attached to lengthy and slow development/deployment of new products has become unsustainable due to the nature of “the winner takes all” in semiconductor industry today.

This thesis discusses the vertical disintegration and integration of semiconductor industry, particularly, the consideration of profit, time-to-market and development resource lead foundry providers to master specialization (such as DFM, embedded memory, power efficiency, bandwidth, high precision analog) where the existing design or process capabilities along the value chain are heterogeneous. The boundary between wafer foundry and its customers changed/evolved in the cases of virtual IDM, foundry-direct, re-targeting and re-branding. The business models of these four cases have to be appropriate to manage the relationship and expectation of foundry’s customers. The double helix system of wafer foundry is a variant of the IDM where wafer foundry providers beef up their capability on design, test and assembly to become the complementors of their customers. Hence, design flow, system, design tools and concurrent engineering management have to be deployed through “agility and speed” to create a responsive supply chain. This is because that the “total service” component of foundry providers and the mindset of foundry employees are critical factor for the shift of double helix on wafer foundry. Foundry providers must manage the global value chain in addition to the management of their own factories and technologies. The challenge to foundry providers is to shift from wafer production to value co-creation where “enablers” are deployed on time to allow faster development pace and frequent/profitable product upgrade. The changes in the capability in the supply chain will reshape the landscape of foundry and change the roster of qualified participants of semiconductor industry.

Most semiconductor suppliers have either already executed or are in the process of implementing the shift from “captive fab” to “shared foundry”. The foundry providers urgently need to articulate the need of their customers, and stimulate the creation of IDM-alike infrastructure to serve as an extension of resource for their customers to face the challenge and opportunities ahead.
目錄
中文摘要 I
英文摘要 III
致謝 VI
目錄 VII
表目錄 VIII
圖目錄 IX
第一章 緒論 1
第一節 研究背景與動機 1
第二節 研究的目的與範圍 2
第三節 研究範圍 4
第四節 研究架構 4
第五節 研究方法 5
第二章 文獻探討 6
第一節 垂直整合及水平分工 6
第二節 競爭策略環境 11
第三節 合作廠商能力共演化 18
第三章 晶圓代工產業分析 23
第一節 產業概況 23
第二節 產業驅動力和特性 32
第四章 雙螺旋下的晶圓代工商業模式 37
第一節 虛擬垂直整合 37
第二節 Foundry Direct 44
第三節 Re-targeting 51
第四節 Re-branding 56
第五章 結論 58
參考文獻 63





表目錄
表3.1 半導體技術之摩爾定律法則 23
表3.2 晶圓尺寸世代轉換 27
表3.3 全球半導體市場需求規模 28
表3.4 2008全球前20大半導體業者 29
表3.5 Top 5 Foundry ROE 30
表3.6 典範的轉移 34















圖目錄
圖1.1 研究架構 4
圖2.1 雙螺旋曲線(Double Helix) 7
圖2.2 PC產業的水平結構和產品模組化架構 11
圖2.3 Porter五力分析 12
圖2.4 五力分析考慮因素 13
圖2.5 Jobobides〝能力循環〞-說明企業生產體系的短期架構 21
圖2.6 Jobobides的〝交易成本,能力和範疇的共演化〞 21
圖3.1 每一晶方電晶體數目(Transistors per Chip) 24
圖3.2 半導體價格趨勢-每百萬電晶體的價格 24
圖3.3 電腦的power/cost演化 25
圖3.4 每年平均成本價低趨勢 26
圖3.5 積體電路成本功能比下降的方法 26
圖3.6 半導體產業RD的成本變化趨勢 27
圖3.7 晶圓代工和IC產業成長率的比較 30
圖3.8 電子市場驅動力演變 33
圖3.9 Netbook應用和市場脈動變化 34
圖3.10 No Market For Second To Market 35
圖3.11 半導體的First Mover取得大部份的利潤 36
圖3.12 半導體Segment的市場佔有率影響到利潤率 36
圖4.1 全球企業投資策略 39
圖4.2 IC設計成本變化 40
圖4.3 產品複雜度與設計能力的成長率比較 42
圖4.4 晶圓代工業價值鏈 43
圖4.5 半導體產業的分工和整合 44
圖4.6 價值鏈的利潤 45
圖4.7 Only Change is Forever!〝M〞shape Market 46
圖4.8 Foundry Direct Business Model 47
圖4.9 Revised Foundry Direct Business Model 49
圖4.10 產品,製程和供應鏈發展時交集部份的責任 50
圖4.11 Design flow for Re-targeting products 55
圖4.12 Re-targeting Case T 56
圖4.13 Re-targeting Case M 56
圖5.1 Worldwide Fabless Semiconductor Revenue, 1998-2008 59
圖5.2 晶圓廠先進製程技術研發和Ramp-up成本 60
圖5.3 晶圓廠建廠成本 60
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