關於3D-IC 平面配置(floorplan) 的研究成果有很多，其中有不少是關於矽通道(Through-Silicon Via，以TSV 表示) 配置的研究。這些研究大致上可分為兩類，一類是只有考慮訊號TSV(Signal TSV，以S-TSV 表示) 位置及配置的研究，另一類是只考慮熱的TSV(Thermal TSV，以T-TSV 表示) 配置的研究。他們都單純只考量其中的一類，而沒有將他們的配置一起做考量，這會讓只做S-TSV 配置的方法少了TSV 能幫助降溫的好處，只考量T-TSV 配置的方法會因為少了S-TSV 的位置而低估繞線長度，並且S-TSV 也能協助散熱，適當地配置S-TSV 也會減少額外的T-TSV，因此可以降低全部的TSV 數量。有鑑於此，我們認為把S-TSV 和T-TSV一起做考量，才不會失去兩方面所帶來的好處，也會讓TSV 的配置更完善。在這篇論文提出了一個S-TSV 與T-TSV 配置的方法，並使用最小成本最大流的方法進一步地改善S-TSV 配置，並能考慮T-TSV 的位置，使得TSV 的總數量更少。

1 簡介
2 研究動機及相關的研究成果
2.1 研究動機
2.2 相關的研究成果
2.2.1 3D 平面配置的S-TSV 配置(S-TSV Planning in 3D Floorplanning)
2.2.2 3D 平面配置的T-TSV 配置(T-TSV Planning in 3D Floorplanning)
2.2.3 空白空間的重分配(White Space Redistribution)
3 問題模型及定義
3.1 面向背積體化技術
3.2 繞線長度的估算
3.3 熱分析模組
3.4 問題規劃
4 演算法
4.1 T-TSV 的配置
4.2 用HSPICE 做溫度分析
4.3 S-TSV 的重新分配
5 實驗結果
5.1 在不同階段配置T-TSV 的差異
5.2 S-TSV 重配置的結果
6 結論

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