本論文研製橫向型高電壓氮化鎵金氧半場效電晶體，同時利用乾蝕刻平台結構與離子佈值技術的雙重絕緣結構隔絕基板表面漏電流。我們證實空乏式N型氮化鎵金氧半場效電晶體最大電流密度為100mA/mm，臨界電壓為-3V，導通電阻為35 mΩ-cm2 (VGS=35V)，場效載子遷移率為26 cm2/Vs(VDS=0.1V)；同時證實增進式P型氮化鎵金氧半場效電晶體，臨界電壓為2.37V，最大電流密度為70mA/mm，導通電阻為48 mΩ-cm2 (VDS=0.5V)，場效載子遷移率為21 cm2/Vs(VDS=0.1V)。在通道長度為3μm，漂移區長度為25μm的P型氮化鎵金氧半場效電晶體元件，最大崩潰電壓為120V。
另外研製橫向型高電壓氮化銦鎵金氧半場效電晶體，藉由氮化銦鎵通道試圖改善氮化鎵金氧半場效電晶體的場效載子遷移率，我們使用源極與汲極金屬未燒結方式以及未加入源極與汲極重摻雜結構製作金氧半場效電晶體，全程皆為低溫製程，同時延伸閘極與汲極之間距離，製作空乏式高電壓金氧半場效電晶體，最大崩潰電壓為380V，通道長度100μm的最大場效載子遷移率為93 cm2/Vs。

Lateral high-voltage single RESURF GaN MOSFETs on sapphire substrates were investigated and fabricated, with mesa isolation and Zn implantation isolation to avoid surface leakage. We demonstrated depletion-mode uGaN MOSFETs with a maximum drain current density up to 100mA/mm, a threshold voltage of -3V and a specific on-state resistance of 35mΩ-cm2 when VG=35V. The channel mobility is 26 cm2/Vs extracted from linear region at VDS=0.1V. Furthermore, we have demonstrated enhancement-mode pGaN MOSFETs with a threshold voltage of 2.37V and a maximum drain current density higher than 70mA/mm, a specific on-state resistance as low as 48mΩ-cm2 at VG=35V. The channel mobility of 21 cm2/Vs is extracted from linear region at VDS=0.1V. A pGaN MOSFET with a channel length of 3μm and a RESURF length of 25 μm shows a maximum breakdown voltage up to 120V.
A lateral high-voltage InGaN MOSFET has also been investigated attempting to improve the channel mobility of GaN MOSFETs. In the fabrication of InGaN MOSFET, no ion implantation and no sintering for source and drain region was done and all fabrication has been realized at low temperatures. The depletion-mode InGaN HV-MOSFET was fabricated with the maximum breakdown voltage of 380V. The channel mobility measured from a long channel (100μm) device is 93 cm2/Vs.

目錄

英文摘要----------------------------------------------------------------------------I
中文摘要--------------------------------------------------------------------------II
致謝-------------------------------------------------------------------------------III
目錄------------------------------------------------------------------------------VI
圖目錄----------------------------------------------------------------------------X
表目錄--------------------------------------------------------------------------XVI

第一章 序論--------------------------------------------------------------------1
1.1 前言------------------------------------------------------------------------1
1.2氮化鎵的材料特性-------------------------------------------------------1
1.3文獻回顧與研究動機-----------------------------------------------------3
1.4論文大綱------------------------------------------------------------------10
第二章 元件設計與光罩設計-------------------------------------------11
2.1元件結構與設計--------------------------------------------------------11
2.1.1氮化鎵基板種類介紹-------------------------------------------13
2.1.2 Single-zone RESURF結構應用於MOSFET----------------14
2.1.3場平板結構應用於MOSFET----------------------------------15
2.1.4藍寶石絕緣基板應用於MOSFET----------------------------16
2.2 元件光罩設計----------------------------------------------------------16
第三章 元件製程--------------------------------------------20
3.1 GaN元件製作流程-----------------------------------------------------20
3.1.1蝕刻對準標誌----------------------------------------------------20
3.1.2漂移區離子佈植-------------------------------------------------20
3.1.3離子佈植阻擋層-------------------------------------------------21
3.1.4源極及汲極離子佈植-------------------------------------------21
3.1.5離子佈值區域活化----------------------------------------------22
3.1.6 RCA清洗---------------------------------------------------------23
3.1.7閘極介電層與退火----------------------------------------------23
3.1.8源汲極歐姆接觸-------------------------------------------------24
3.1.9隔絕離子佈值----------------------------------------------------24
3.1.10閘極金屬定義---------------------------------------------------25
3.1.11場氧化層、金屬Pad與場平板--------------------------------25
3.2 InGaN元件製作流程-------------------------------------------------29
3.2.1蝕刻對準標誌----------------------------------------------------29
3.2.2隔絕離子佈值----------------------------------------------------29
3.2.3源極與汲極金屬-------------------------------------------------30
3.2.4閘極介電層與源汲極金屬開洞-------------------------------30
3.2.5閘極金屬定義與Pad、場平板金屬定義----------------------30
第四章 量測結果與分析--------------------------------34
4.1 測試結構分析---------------------------------------------------------34
4.1.1 TLM (Transfer Length Measurement)-----------------------34
4.1.2四點探針(Four Point Probe)----------------------------------35
4.2 元件製程參數分析--------------------------------------------------38
4.2.1 閘極介電層品質-----------------------------------------------38
4.2.2 離子佈值活化率-----------------------------------------------39
4.3 GaN MOSFET 電壓-電流量測與分析---------------------------40
4.3.1 u/p-GaN 基板漏電流分析-----------------------------------40
4.3.2 u/p-GaN 基本電性量測與分析-----------------------------41
4.3.3 u/p-GaN 改善基本電性方式--------------------------------48
4.3.4 GaN溫度效應--------------------------------------------------53
4.4 InGaN MOSFET 電壓-電流量測與分析-------------------------58
4.4.1 InGaN基板特性探討------------------------------------------58
4.4.2 InGaN TLM測試結構量測-----------------------------------58
4.4.3 InGaN基本電性量測與分析---------------------------------60
4.4.4 InGaN 溫度效應-----------------------------------------------67
4.4.5 InGaN recess前後比較分析----------------------------------68
4.5 GaN與InGaN MOSFET高壓元件電性量測與分析-----------70
4.5.1 p-GaN HV-MOSFET崩潰電壓量測------------------------71
4.5.2 InGaN HV-MOSFET基本電性與崩潰電壓量測---------72
第五章 結論與未來工作改善-------------------------------------76
參考文獻------------------------------------------------------------------------78

圖目錄

圖1-1 橫向型耐高壓two-zone RESURFMOSFET剖面圖----------------7
圖1-2 橫向型AlGaN MOS-HEMT剖面圖-----------------------------------8
圖1-3 橫向型磊晶RESURF結構GaN MOSFET剖面圖------------------9
圖1-4 橫向型hybrid結構AlGaN MOS-HEMT剖面圖--------------------9
圖2-1 Single-zone RESURF GaN MOSFET示意圖-----------------------12
圖2-2 InGaN MOSFET示意圖-----------------------------------------------12
圖2-3 InGaN HV-MOSFET示意圖------------------------------------------12
圖2-4 uGaN晶圓結構示意圖-------------------------------------------------13
圖2-5 pGaN晶圓結構示意圖-------------------------------------------------13
圖2-6 InGaN晶圓結構示意圖------------------------------------------------13
圖2-7 模擬崩潰電壓對RESURF區濃度與基板濃度電荷平衡圖-----15
圖2-8 場平板結構示意圖------------------------------------------------------16
圖2-9 製作Single-zone RESURF GaN MOSFET結構示意圖---------17
圖2-10 實際元件Layout圖，左圖為線型結構、右圖為圓形結構-------17
圖2-11 Single-zone RESURF GaN MOSFET光罩佈局設計------------18
圖2-12 實際製作InGaN HV-MOSFET元件結構示意圖-----------------19
圖2-13 InGaN MOSFET光罩佈局設計-------------------------------------19
圖3-1 漂移區離子佈植濃度與深度分佈------------------------------------21
圖3-2 源極及汲極區域離子佈植濃度與深度分佈------------------------22
圖3-3 閘極介電層退火溫度與時間關係圖---------------------------------24
圖3-4 圓形及線型結構元件完成微影圖------------------------------------26
圖3-5(a) Mask1後續光罩對準標誌與平台(Mesa)之蝕刻---------------26
圖3-5(b) Mask2 N- RESURF離子佈植--------------------------------------26
圖3-5(c) Mask3 源極與汲極離子佈植--------------------------------------27
圖3-5(d) Mask4 閘極介電層沉積及源極與汲極歐姆接觸--------------27
圖3-5(e) Mask5 隔絕離子佈值-----------------------------------------------27
圖3-5(f) Mask6 閘極金屬------------------------------------------------------28
圖3-5(g) Mask7 場氧化層沉積與開Pad沉積Via金屬-------------------28
圖3-5(h) Mask8 沉積場平板金屬--------------------------------------------28
圖3-6 AFM Roughness average------------------------------------------------29
圖3-7 圓形及線型結構元件完成微影圖------------------------------------31
圖3-8(a) Recess InGaN ---------------------------------------------------------31
圖3-8(b) Mask1 後續光罩對準標誌與平台(Mesa)之蝕刻--------------31
圖3-8(c) Mask2 隔絕離子佈值----------------------------------------------32
圖3-8(d) Mask3 源極與汲極金屬-------------------------------------------32
圖3-8(e) Mask4 沉積閘極介電層與源汲極開洞-------------------------32
圖3-8(f) Mask5 閘極金屬------------------------------------------------------33
圖3-8(g) Mask6 源極與汲極場平板----------------------------------------33
圖4-1(a) TLM結構圖-----------------------------------------------------------34
圖4-1(b) TLM元件微影圖-----------------------------------------------------34
圖4-2 TLM結構接觸電阻對距離圖-----------------------------------------35
圖4-3(a) 四點探針結構---------------------------------------------------------36
圖4-3(b) 四點探針元件微影圖------------------------------------------------36
圖4-4 p-GaN RESURF 四點探針量測--------------------------------------37
圖4-5 u-GaN RESURF 四點探針量測--------------------------------------38
圖4-6 PECVD TEOS-SiO2 C-V圖-------------------------------------------39
圖4-7 PECVD TEOS-SiO2 J-E圖--------------------------------------------39
圖4-8 活化源極與汲極離子佈值區域TLM量測-------------------------40
圖4-9 u/p-GaN相鄰元件之間基板漏電流----------------------------------41
圖4-10(a) p-GaN LG=3μm,WG=110μm MOSFET ID-VD圖---------------43
圖4-10(b) p-GaN LG=3μm,WG=110μm MOSFET ID-VG及μFE-VG圖---43
圖4-11(a) p-GaN LG=5μm,WG=110μm MOSFET ID-VD圖---------------44
圖4-11(b) p-GaN LG=5μm,WG=110μm MOSFET ID-VG及μFE-VG圖---44
圖4-12(a) p-GaN LG=100μm,WG=110μm MOSFET ID-VD圖------------45
圖4-12(b) p-GaN LG=100μm,WG=110μm MOSFET ID-VG及μFE-VG圖---------------------------------------------------------------------------45
圖4-13(a) u-GaN LG=3μm,WG=110μm MOSFET ID-VD圖---------------46
圖4-13(b) u-GaN LG=3μm,WG=110μm MOSFET ID-VG及μFE-VG圖---46
圖4-14(a) u-GaN LG=5μm,WG=110μm MOSFET ID-VD圖---------------47
圖4-14(b) u-GaN LG=5μm,WG=110μm MOSFET ID-VG及μFE-VG圖---47
圖4-15(a) p-GaN LG=3μm MOSFET不同退火時間ID-VG圖------------48
圖4-15(b) p-GaN LG=3μm MOSFET VT- annealing time圖--------------49
圖4-15(c) p-GaN LG=3μm MOSFET μFE- annealing time圖-------------49
圖4-15(d) p-GaN LG=3μm MOSFET before/after annealing ID-VD圖--49
圖4-16(a) p-GaN LG=3μm MOSFET before/after annealing ID-VD圖---50
圖4-16(b) p-GaN LG=3μm MOSFET退火15分鐘後 ID-VG圖----------50
圖4-17(a) u-GaN LG=3μm MOSFET退火15分鐘後ID-VD圖-----------51
圖4-17(b) u-GaN LG=3μm MOSFET退火15分鐘後ID-VG圖-----------51
圖4-18(a) p-GaN LG=3與5μm MOSFET退火15分鐘前VT分佈圖---52
圖4-18(b) p-GaN LG=3與5μm MOSFET退火15分鐘後VT分佈圖---52
圖4-18(c) u-GaN LG=3與5μm MOSFET退火15分鐘前VT分佈圖---53
圖4-18(d) u-GaN LG=3與5μm MOSFET退火15分鐘後VT分佈圖---53
圖4-19(a) p-GaN LG=3μm MOSFET不同量測溫度ID-VD圖------------55
圖4-19(b) p-GaN LG=3μm MOSFET不同量測溫度ID-VG圖------------55
圖4-19(c) p-GaN LG=3μm MOSFET不同量測溫度IG-VG圖------------56
圖4-19(d) p-GaN LG=3μm MOSFET不同量測溫度ID,Max-VD電流圖--56
圖4-19(e) p-GaN LG=3μm MOSFET不同量測溫度RON-Temp.圖------57
圖4-19(f) p-GaN LG=3μm MOSFET不同量測溫度μFE-Temp.圖-------57
圖4-20 100nm InGaN TLM結構接觸電阻對距離圖---------------------59
圖4-21 30nm InGaN TLM結構接觸電阻對距離圖-----------------------59
圖4-22(a) InGaN LG=2μm,WG=100μm MOSFET ID-VD圖---------------61
圖4-22(b) InGaN LG=2μm,WG=100μm MOSFET ID-VG及μFE-VG圖--61
圖4-23(a) InGaN LG=15μm,WG=100μm MOSFET ID-VD圖--------------62
圖4-23(b) InGaN LG=15μm,WG=100μm MOSFET ID-VG及μFE-VG圖--62
圖4-24(a) InGaN LG=100μm,WG=100μm MOSFET ID-VD圖------------63
圖4-24(b) InGaN LG=100μm,WG=100μm MOSFET ID-VG及μFE-VG圖--------------------------------------------------------------------------63
圖4-25(a) InGaN LG=2μm,WG=120μm MOSFET ID-VD圖---------------64
圖4-25(b) InGaN LG=2μm,WG=120μm MOSFET ID-VG及μFE-VG圖--64
圖4-26(a) InGaN LG=15μm,WG=120μm MOSFET ID-VD圖-------------65
圖4-26(b) InGaN LG=15μm,WG=120μm MOSFET ID-VG及μFE-VG圖-65
圖4-27(a) InGaN LG=100μm,WG=120μm MOSFET ID-VD圖------------66
圖4-27(b) InGaN LG=100μm,WG=120μm MOSFET ID-VG及μFE-VG圖------------------------------------------------------------------------66
圖4-28 InGaN LG=5μm MOSFET不同量測溫度ID-VD圖---------------67
圖4-29 InGaN LG=5μm MOSFET不同量測溫度μFE-Temp.圖----------68
圖4-30 InGaN MOSFET不同通道長度LG-場效載子遷移率μFE圖----69
圖4-31 高壓量測系統示意圖-------------------------------------------------70
圖4-32 p-GaN HV-MOSFET崩潰電壓電流圖-----------------------------71
圖4-33(a) InGaN LG=3μm, LGD=10μm MOSFET ID-VD圖---------------72
圖4-33(b) InGaN LG=3μm, LGD=10μm MOSFET ID-VG及μFE-VG圖---73
圖4-34 InGaN HV-MOSFET崩潰電壓電流圖-----------------------------73
圖4-35 InGaN HV-MOSFET崩潰電壓對閘汲極間距圖-----------------74
圖4-36 InGaN HV-MOSFET導通電阻對通道長度圖--------------------74
圖4-37 InGaN HV-MOSFET導通電阻對閘汲極間距圖-----------------75

表目錄

表1-1 氮化鎵與其他材料的物性比較----------------------------------------2
表2-1 氮化鎵基板種類--------------------------------------------------------14
表2-2 Single-zone RESURF GaN MOSFET元件尺寸設計--------------18
表2-3 InGaN MOSFET元件尺寸設計--------------------------------------19
表3-1 漂移區離子佈植能量與劑量------------------------------------------20
表3-2 源極及汲極區域離子佈植能量與劑量------------------------------22
表3-3 GaN RCA 清洗步驟----------------------------------------------------23
表3-4 隔絕區域離子佈植能量與劑量--------------------------------------25
表4-1 InGaN MOSFET LG=2μm, Before/After recess特性比較--------69

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