本論文利用常見之標準SiGe BiCMOS製程設計一Full HD(1920x1080)影像陣列的影像感測器，期望能夠同時達到高動態範圍與30frame/s的規格。
因為1920x1080陣列走線阻值和寄生電容之數量級很可能影響訊號的傳遞，在讀出電路和數位訊號控制電路的設計上必須詳加考量。第四章將會針對整個影像感測器電路各區塊做逐步設計，並點出需詳加考量走線阻值和寄生電容的部分。期望這些經驗有助於往後設計出更接近商品規格的影像感測器。
動態範圍上，本論文使用的SiGe BC接面二極體具有極佳的靈敏度，在大範圍光強度下可以產生大範圍的光電流。為了處理大範圍的電流訊號，巧妙的利用SiGe BiCMOS製程中可順偏操作的二極體來做對數轉換，故影像感測器可獲得高動態偵測範圍至少132.7 dB(光電流範圍為10 pA~43 uA)，且在低照度的感測靈敏度可到0.01 lux。

目錄
第一章 前言 1
1.1 研究背景與發展現況 1
1.2 研究動機 3
1.3 論文章節架構 4

第二章 CMOS影像感測器之特性 5
2.1 CMOS影像感測器的基本操作與原理 5
2.2 CMOS影像感測器的特性 7
2.2.1 量子效率(Quantum efficiency)及響應度(Responsivity) 7
2.2.2 填充係數(Fill Factor) 7
2.2.3 吸收係數(Absorption Coefficient) 8
2.2.4 暗電流(Dark Current) 8
2.2.5 動態範圍(Dynamic Range) 9
2.2.6 畫面速率 (Frame Rate) 10
2.2.7 雜訊(Noise) 10

第三章 CMOS影像感測器常見之讀出電路 12
3.1 CMOS影像感測器常見之像素架構 12
3.2 CMOS影像感測器常見之雜訊抑制讀出電路 15
3.2.1 相關雙重取樣(Correlated Double Sampling) 16
3.2.2 DDS(Delta-Difference Sampling) 17
3.2.3 二次相關雙重取樣(Double CDS) 18
3.2.4 Column ADC 19
3.2.5 總結 20

第四章 大陣列影像感測器之設計 21
4.1 SiGe感光二極體 22
4.2 對數型主動像素感測電路設計 23
4.2.1 對數轉換設計概念 24
4.2.2 適用大輸入動態範圍與大陣列之對數轉換像素設計 27
4.3 Fixed Pattern Noise抑制電路設計 37
4.4 偏壓電路設計 49
4.5 時脈產生電路設計 51
4.6 時脈控制電路設計 53
4.6.1 影像感測器的的讀出時脈 53
4.6.2 行、列控制電路設計 55
4.6.3 其他控制電路設計 56
4.6.4 寄生效應與Repeater的使用 57
4.7 整體電路時脈控制 60

第五章 模擬結果 62
5.1 像素電路模擬 62
5.2 1st CDS電路模擬 64
5.3 偏壓電路模擬 66
5.4 Full HD影像感測陣列模擬 68
5.5 時脈產生電路模擬 73
5.6 數位控制電路模擬 74

第六章 量測計劃 76
6.1 量測晶片說明 76
6.2 量測系統的建立 77
6.3 量測步驟 81

第七章 總結 84
7.1 成果整理 84
7.2 後續研究改進之建議 84

參考文獻 86

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