應用金屬濕蝕刻後製程之CMOS-MEMS三軸加速度計的設計與製造

Design and Implementation of CMOS-MEMS Tri-Axis Accelerometers Using Metal Wet-Etching Post Process

蔡明翰 ； 劉育嘉 ； 方維倫

《國家奈米元件實驗室奈米通訊》 17卷3期 (2010/09) Pp. 29-35

https://doi.org/10.29913/NDLC.201009.0006

摘要

本研究提出一元件與製程設計方法可用以改良互補式金屬氧化半導體－微機電(CMOS-MEMS)電容式感測器之效能，CMOS-MEMS元件除了包含有標準CMOS製程外，還有用以懸浮元件的後CMOS製程，本研究所提出之後CMOS製程以蝕刻金屬之方法來實現本研究之設計，CMOS製程中的二氧化矽材料被用來作為結構之主體，金屬與引洞層被用來作為感測電極與蝕刻之犧牲層，此製程方法有三大好處：(1)寄生電容因為二氧化矽結構而大幅減少，(2)同平面與出平面電容感測間隙可大幅降低至次微米等級以增加訊號，(3)平板式電極設計取代梳狀電極設計可大幅增加電容感測之面積。本研究設計並製造一三軸加速度計晶片來驗證前述特色之可行性，最終晶片量測結果顯示元件靈敏度與相似之結構比較改良了接近一個數量級而達到11.5mV/G（同平面方向）、7.8mV/G（出平面方向），除此之外，本研究製造之三軸加速度計即使是在10mG的極小加速度下，其元件訊號依然可以成功並清楚的被量測。

關鍵字

互補式金屬氧化物半導體 ； 微機電 ； 三軸加速度計

並列摘要

This study presents the design to improve the performance of CMOS-MEMS gap-closing capacitive sensor. In addition to the standard CMOS process, the metal wet-etching approach is employed as the post-CMOS process to realize the present design. The dielectric layers of CMOS process are exploited to form the main micro mechanical structures of the sensor. The metal layers of CMOS process are used as the sensing electrodes and sacrificial layers. The advantages of the sensor design are as follows, (1) the parasitic capacitance is significantly reduced by the dielectric structure, (2) in-plane and out-of-plane sensing gaps can be reduced to increase the sensitivity, and (3) plate-type instead of comb-type out-of-plane sensing electrodes is available to increase the sensing area. To demonstrate the feasibility of the present design, a 3-axis capacitive CMOS-MEMS accelerometers chip is implemented and characterized. Measurements show the sensitivities of accelerometers respectively reach 11.5mV/G (in X-, Y-axis) and 7.8mV/G (in Z-axis) which are near one order larger than existing designs. Moreover, the detecting of 10mG excitation using the 3-axis accelerometer is demonstrated for both in-plane and out-of-plane directions.

並列關鍵字

CMOS ； Micro-Electro-Mechanical-System ； Tri-Axis Accelerometer