適應型預增強雙向收發器之設計與實現

隨著CMOS 製程技術的發展及處理器能力之提升，資料每秒傳輸速率不斷攀升，當資料傳輸率達到Gbps以上，在此需求下，高速晶片間輸入/輸出電路的研究日趨重要，許多研究致力於提昇晶片間輸入/輸出的速度，以維持高容量網路和高性能電腦系統的頻寬需要。當資料傳輸率達到每秒十億位元以上，資料在傳輸線上的傳送將面臨許多問題，最主要的便是高頻訊號在傳輸線上的傳送將受到傳輸線特性的影響而高頻訊號被衰減，衰減後的訊號到達接收端嚴重可能使資料流失，為了補償傳輸線高頻衰減的訊號，在本論文中提出在傳送端以預增強補償的方法抵抗資料在傳輸線上的損耗。為了使晶片在不同操作環境下能夠正確動作，我們以雙向傳收的方式完成適應性預增強電路，在資料從發送端送入傳輸線前預先補償以抵抗傳輸線之高頻損耗現象。

關鍵字

預增強；可適性預增強；雙向傳收；收發器；雙向傳收收發器

並列摘要

With the ever-growing CMOS process technique and the increasing of multimedia applications, the demand of bandwidth for data transmission has increased. As the demand of high bandwidth links for high speed communication is increasing, the development of chip-to-chip interconnect plays an important role. When data rate goes up to Gbps, the signal quality will be limited by the transmission line. One important characteristic of a transmission line is that it functions as a low-pass filter which will attenuate the high frequency component of a transmitted data. Among the existing solutions, pre-emphasis in transmitter and equalizer in receiver are mostly used. However, making a pre-emphasis circuit in transmitter adaptive is not an easy work due to the lack of the received signal information in the receiver. Unless a backplane trace or bidirectional technique is used, the adaptive pre-emphasis becomes feasible. In this Thesis, we propose a simultaneous bidirectional transceiver using an adaptive pre-emphasis architecture to overcome the channel high-frequency loss and hence improve the transmitted data rate.

並列關鍵字

pre-emphasis ； adaptive pre-emphasis ； simultaneous bidirectional ； transceiver ； simultaneous bidirectional transceiver

參考文獻

[11] D.K. Cheng, Field and Wave Electromagnetics (2nd Edision), Wesley, 1989.

[1] C.H. Lin, C.H. Wang, and S.J. Jou, “5Gbps Serial Link Transmitter with Pre-emphasis,” Asia and South Pacific Design Automation Conference, pp. 795-800, Jan. 2003.

[3] C. H. Lin, C. H. Tsai, C. N. Chen, and S. J. Jou, “Multi-Gigabit Pre-Emphasis Design and Analysis for Serial Link,” IEICE Trans. Electron., vol. e88-c, no. 10, pp. 2009-2019, Oct. 2005.

[4] M. Li, S. Wang, Y. Tao, and T. Kwasniewski, “FIR Filter Optimisation as Pre-emphasis of High-speed Backplane Data Transmission,” Electronics Latters, vol. 40, no. 14, pp. 912-913, Jul. 2004.

[5] M. Li, T. Kwasniewski, S. Wang, and Y. Tao, “A 10Gb/s Transmitter with Multi-Tap FIR Pre-Emphasis in 0.18μm CMOS Technology” Asia and South Pacific Design Automation Conference, vol. 2, pp. 679-682, Jan. 2005.

國際替代計量

適應型預增強雙向收發器之設計與實現

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