- 學位論文
多層膜結構二極記憶體之研究
A Study of Diode Memory with Multi-Layer Structures
摘要
本論文提出了一個具有新式相變化的操作機制與材料，操作原理結合了傳統相變化記憶體的基本特性，以及電子共振穿隧二極體的負微分電阻的特性。而選用的材料則與傳統的相變化材料不同，乃利用電漿輔助型原子層沉積系統成長金屬氧化物(氧化鉿、氧化鋅、氧化鎵)，並堆疊成雙能障量子井的結構。 本論文主要分為兩部分。第一部分為記憶體元件之製作，包含了電漿輔助型原子層沉積系統的原理與操作、沉積材料成長速率之校正、X射線光電子能譜特性分析，以及元件完整的製程。第二部分為記憶體元件之電性量測，包含了相變化特性曲線、轉換臨界功率的比較、寫入(Set)與重置(Reset)的關係及壽命讀寫次數的量測。 我們用電漿輔助型原子層沉積系統沉積了HfO2/ZnO/HfO2 (2/4/2及2/6/2 nm)和Ga2O3/ZnO/HfO2 (4/2/4、4/3/4及4/4/4 nm)兩種結構，並製作四種元件面積，625π、3025π、7225π及11025π平方微米，發現在Ga2O3/ZnO/HfO2為4/2/4且面積為625π〖 μm〗^2時有較佳的特性。其有較小的轉換臨界功率(約為2.6mW)，元件的電阻開關比可達1000倍，抹寫次數可達超過100次。
並列摘要
In this thesis, we demonstrate a new device mechanism and material system for realizing phase change memory (PCM). We combine two device concepts into one single device, i.e., phase change memory and resonant tunneling diode. Metal oxide were used as the phase changing material, unlike the conventional GeSbTe material. Our devices was prepared by the Plasma-Enhanced Atomic Layer Deposition (PEALD) system, with a double-barrier quantum-well structure. There are two main parts in this thesis. First, we introduce how to make our memory device, including the mechanism and operation of PE-ALD, the calibration of growth rate and X-ray photoelectron spectroscopy analysis of each material, and the whole device fabrication process. Second, we discuss the electrical measurements, including characteristic I-V curves, comparison of threshold powers for phase change, relationship between set and reset conditions, and life-time cycling test. Oxide stacks of HfO2/ZnO/HfO2 (2/4/2, 2/6/2 nm) and Ga2O3/ZnO/HfO2 (4/2/4, 4/3/4 and 4/4/4 nm) were deposited by PE-ALD, and devices of 625π, 3025π, 7225π and 11025π 〖μm〗^2 were fabricated. We found that Ga2O3/ZnO/HfO2 (4/2/4) device of area 625π 〖μm〗^2 has the best properties for PCM device: lowest threshold power of ~ 2.6 mW, highest resistance on/off ratio of ~ 1000, and more than 100 times operation in life-time cycling test.
參考文獻
延伸閱讀
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