一個低功率的連續漸進式數位轉換器

A Low Power Successive-Approximation Register ADC

胡耀升(Yao-Sheng Hu)

指導教授 ： 陳信樹

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2014年)

https://doi.org/10.6342/NTU.2014.10232

摘要

類比數位轉換器在電子系統中扮演極重要的角色，它是自然界類比信號與數位信號中間的橋梁。近年來隨著低功率的電子產品的需求越來越高，特別是應用在無線通訊、感應器與生醫系統中，所以如何降低類比數位轉換器的耗電以及如何能在低電壓下類比數位轉換器還能正常的運作儼然成為一個非常熱門的題目。在各種不同的架構中，連續漸進式式類比數位轉換器不需要放大器且內部架構大部分都是數位電路，因此可以達到在低電壓與低功率下運作的要求。
本論文主要提出一個新的偵測與迴避演算法搭配一個新的同步切換省電技巧，運用在連續漸進式類比數位轉換器當中，不需額外的校正，就可以達到低電壓與低功率消耗。此演算法驗證於台積電低壓40奈米製程10位元連續漸進式類比數位轉換器，工作電壓為0.45伏特，單通道轉換速度為每秒二十萬次，功耗只有84奈瓦，獲得8.95的有效位元，並將FoM下降到只剩下0.85 fJ/conversion-step，因為沒有額外的校正電路，主電路所占面積只有0.0065平方毫米。在奈奎斯特頻率下，SNDR、SFDR、SNR與THD等動態的表現分別為55.63dB、76.25dB、55.75dB與71.3dB。運用細心與對稱的電路佈局搭配1.5fF的小單位電容，將靜態特性達到+0.29/-0.44 LSB的差動非線性(DNL)、+0.45/-0.29 LSB的積分非線性(INL)表現。

關鍵字

類比/數位轉換 ； 連續漸進式 ； 低功率 ； 低電壓 ； 小面積

並列摘要

Today analog to digital converter (ADC) plays an important role in electronic systems. It is a bridge between nature analog environment and digital world. Recently requirement of low power application grows gradually, especially in wireless communication, sensor network and biomedical system. As the result, how to decrease the power dissipation of ADC and how to make ADC operate at ultra low voltage system become big issues. In different types of ADC, successive approximation register (SAR) ADC does not have op-amplifier and most blocks are only digital circuits, so SAR ADC can achieve the low power and low voltage specification.
The thesis proposes the new detect-and-skip algorithm combined with aligned switching technique which is used in SAR ADC. This SAR ADC does not need additional calibration to achieve low power dissipation and low voltage operation. The algorithm and technique are verified by TSMC 1P6M3X1Z1U Low Power CMOS process. This work operates at in 0.45V supply voltage. Its power dissipation is only 84nW and gets 8.95 bit ENOB performance. As the result, the performance is decreased to . Without additional calibration circuit, the core circuit area is only 0.0065mm2. At Nyquist rate frequency, the dynamic performance parameters like SNDR, SFDR, SNR and THD are 55.63dB, 76.25dB, 55.75dB and 71.3dB respectively. By careful and symmetric layout, the static performance parameters of differential nonlinearity (DNL) and integral nonlinearity (INL) are +0.29/-0.44 LSB and +0.45/-0.29 LSB respectively. The value of unit capacitor is only 1.5fF.

並列關鍵字

ADC ； SAR ADC ； low power ； low voltage ； small area

參考文獻

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