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  • 學位論文

符合EPC Class-1 Generation-2 通訊協定之915MHz被動式射頻辨識系統標籤電路

UHF 915MHz Passive RFID Tag Circuit Conforming to EPC Class-1 Generation-2 RFID Protocol

指導教授 : 呂學士

摘要


本研究使用TSMC 0.18µm Mixed Signal/RF 1P6M CMOS製程研製一個符合EPC Class-1 Generation-2 通訊協定之915MHz被動式射頻辨識系統標籤電路。在標籤電路中成功整合了倍壓電路(Voltage Multiplier)、限壓電路(Voltage Limiter)、電源參考電路(Voltage Reference)、穩壓器電路(Regulator)、振盪器電路(Oscillator)、電源啟動重置電路(Power-on Reset)、解調變電路(Demodulator)、調變電路(Modulator)以及數位訊號處理電路(Digital Signal Processing Unit)。晶片面積包含I/O PADs為0.62 x 0.57 mm2。吾人試著減少晶片的功率消耗,並且提出了利用雙天線的標籤架構來增加後向散射訊號強度,進而增加傳輸距離。晶片採用打鎊線(Bond-Wire)至印刷電路板(PCB)上進行量測,由實際的量測結果得知,被動式標籤可以經由接收-12dBm~20dBm動態區間的RF訊號產生1伏特的電壓做為晶片內部的電源供應,並驅動其他內部電路正常工作,進而完成與讀取器接收與發送訊號的動作。晶片的功率消耗約為11.2µW,最長的傳輸距離為2.1公尺。

並列摘要


In this thesis, an UHF 915MHz passive RFID tag circuit which conforms to EPC Class-1 Generation-2 RFID protocol is proposed by using TSMC 0.18µm Mixed Signal/RF 1P6M CMOS process. The passive tag consists of a voltage multiplier, a voltage limiter, a voltage reference, a regulator, an oscillator, a power-on-reset circuit, a demodulator, a modulator and a digital signal processing unit. The chip area only requires 0.62 x 0.57 mm2 with I/O pads. We present a dual-antennas architecture and decrease the power consumption to improve the communicating distance. By the measurement results, the passive tag can generate DC voltage 1V in -12dBm~20dBm dynamic range input power. This stable voltage can power up the other internal circuits and make them work regularly. The power consumption is approximately 11.2µW and the maximum communicating distance is 2.1m.

並列關鍵字

EPC RFID Passive Tag Transponder RF to DC

參考文獻


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