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  • 學位論文

太陽能升壓充電之脈衝寬度調變穩壓控制晶片

Solar-Charger with PWM Controller IC for Output Voltage Regulated in Booster Structure

指導教授 : 呂學士

摘要


本論文使用 TSMC 0.35 2P4M CMOS 製程,研製可以利用太陽能,燃料電池等低電壓源系統之電源管理電路。電路設計上分成三部份來實現,第一個部份是數位邏輯控制電路;而第二個部份為類比電路包含內部參考電壓電路,溫度保護電路,脈衝寬度調變(PWM)產生電路,鋸齒波產生電路,過電流保護電路及低輸入電壓啟動電路;第三個部份則由大面積3.3V NMOS做成的開關組成。它的技術採用類比脈衝寬度調變方法來設計,使晶片在整個系統能達到較高的可靠度。 此低電壓脈衝寬度調變及升壓穩壓控制晶片的設計,其輸入啟動電壓可低至0.6V~0.7V,至於輸入電壓可以多低?是由該半導體製程裡,電晶體的臨界電壓所決定;而在系統電路層次上,採用電壓模式的booster架構,量測到的輸出電壓4.8V,整體晶片的消耗功率是111.51mW,晶片面積為2.03 x 1.2mm2。

並列摘要


This thesis presents the design and implements of the Power Management Controller IC, adapted to voltage mode of the pulse width modulation with low input voltage such as solar or fuel cell in TSMC 0.35 2P4M CMOS process. This chip includes three main segments: the first partition is logic control circuit. The second partition is analog circuit which includes linternal reference voltage, over temperature protection, pulse-width modulation, sawtooth wave generation, over current protection, and start-up circuit of ultra-low input voltage. The third segment comprises 3.3V NMOS for power switches. Its technology in design adopts analog PWM method to get higher reliability in whole system. This chip design reveals a low voltage pulse-width modulation controller with voltage mode of booster type on system level for output voltage regulated. Its minimum input start-up voltage is about 0.6V~0.7V. As for how low the input voltage is depended on the threshold voltage of transistor in this semiconductor process. The die area is 2.03 x 1.2 mm2. The system power consumption is 111.51mW and its output voltage is 4.8V.

參考文獻


[2] Zhang Chuan, Lang J un, Zhu Ying, He Shuzhuan, Yang Shengguang, “Full-custom layout design of a PWM power management IC”, Department of Physics , Nanjing University , Nanjing 210093
[4] R. Jacob Baker, Book: “CMOS: Circuit: Design, Layout and Simulation, Revised Second Edition”
[5] Behzad Razavi, Book: “Design of Analog, CMOS Integrated Circuits”
[6] David A. Johns, Ken Martin, Book: “Analog Integrated Circuit Design”
Reference

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