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  • 學位論文

超大規模快閃記憶體儲存裝置之效能、模組化和可靠度技術探討

Enabling Ultra-Scale Flash Memory Storage in the Post-Gigabyte Era: Performance, Scalability and Reliability

指導教授 : 郭大維
共同指導教授 : 張原豪(Yuan-Hao Chang)
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摘要


為了滿足使用者對於快閃記憶體儲存裝置不斷成長的容量需求,3D 快閃記憶體以及MLC (Multi-Level Cell) 快閃記憶體技術已經廣泛被市場以及供應商採用,使得快閃記憶體晶片容量可以持續地透過堆疊以及壓縮的方式不斷增加。然而,如此快速的記憶體需求增長以及堆疊壓縮製程雖然帶來了快速增加容量的優點,同一時間也對快閃記憶體帶來了不好的影響,像是效能變差、擴充性不佳、可靠性變差的議題。這些都會使得未來再設計超大容量的快閃記憶體儲存裝置上帶來相當大的挑戰。本論文提出一個只需極少量主記憶體空間就能有效管理龐大容量的快閃記憶體,使得快閃記憶體容量增長不會因為記憶體空間不足而造成效能大受影響。第二的部分我們從超大容量快閃記憶體在建置上因為特性不斷變化而使得設計成本以及開發成本上會有巨大的困難,也因此在這裡我們提出以模組化晶片去建置固態硬碟,使得新晶片上的不同特性差距可以利用模組化晶片所提共的統一存取介面來克服。同時本論文也提出了一個可以改變資料存取特性的管理方法,使得模組化晶片上為人詬病的讀寫效能問題能被克服。

並列摘要


To meet the growing capacity needs of flash-based storage systems, 3D (NAND) and multi-level-cell (MLC) flash memory are widely considered the promising alternative to continuously scale up the capacity of flash chips. However, the rapid growth of the capacity of a flash-memory storage device imposes challenges on the designs of ultra-scale flash memory storage, such as performance, scalability and reliability issues. This dissertation proposes methodologies from different view points to resolve design issues caused by the keep-changing characteristics of flash memory. We first propose a hybrid index design that over DRAM and flash memory simultaneously to solve the performance issue. The proposed idea can achieve excellent performance even the DRAM space of the evaluated system is very limited. Today’s SSD controllers are facing problems as flash is continuously and frequently updated. Such a phenomenon introduces large cost and heavy bus load on the design of SSD controllers. As a result, a module design to construct an eMMC-enabled SSD is then proposed to solve the scalability issue. An access pattern reshaping design is proposed to simultaneously consider the I/O performance and properties of eMMC-enabled SSDs. With the idea of eMMC-enabled SSD, industry and vendor might has another option to face the problem.

參考文獻


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