透過您的圖書館登入
IP:3.22.249.158
  • 學位論文

經銅線傳輸之百億位元乙太網路系統晶片架構設計

Design of a Baseband Transceiver for IEEE 802.3an 10GBase-T Ethernet

指導教授 : 曹恆偉

摘要


10GBase-T 於 2006 年 6 月 8 日被批准成為正式的 IEEE 標準, IEEE 802.3an 10GBase-T 計畫達到了其目標。 本論文提出適用於 IEEE 802.3an 標準之基頻實體層收發機之架構。 接收機中針對訓練碼同步、 取樣時脈漂移之偵測與補償、 自動增益控制迴路、 通道等化機制、 串擾消除器等等演算法進行開發及研究, 並探討及分析各種非理想狀況像是取樣相位誤差、 時脈抖動、 相位雜訊、 定點數量化誤差等等對接收機效能之影響。 由於 10GBase-T 高速資料傳送收發器上的類比電路是設計上的高難度動作, 因此我們在設計演算法時特別將類比電路之複雜度及是否可實現等納入考量。 除此之外, 我們針對接收機之各種補償迴路及訊號處理方塊之運作提出一套完整的「有限狀態機」控制流程,將接收機每個訊號處理方塊運作之先後順序完整的展現出來。 IEEE 802.3an 10GBase-T 標準最終目標為在 100m 之 4 對銅線上進行 10Gbps 傳輸, 目前我們只針對 CAT6-55m 通道作評估與設計, 以後將繼續努力以達到 100m 的最終目標。

並列摘要


10 GBase-T was approved as IEEE standard on June 8, 2006. The IEEE 802.3an 10GBase-T project achieves the goal. In this thesis, we propose a baseband physical layer (PHY) transceiver architecture for IEEE 802.3an 10GBase-T. Algorithms for training frame synchronization, timing offset detection and compensation, automatic gain control (AGC) loop, channel equalization, and crosstalk and inteference cancellation are embedded in this receiver. A lot of non-ideal effect of receiver such as sampling phase offset, timing jitter, VCO phase noise, and fix-point quantization are analyzed and discussed. The analog circuit is the critical element of “10GBase-T high speed data transmission”. When we design the algorithm of receiver, the complexity and implementation of analog circuit are considered specifically. Besides, we propose a complete finite state machine (FSM) control flow according to the operation of every compensation loop and DSP module in this receiver to represent clearly the steps of all signal processing modules. The goal of IEEE 802.3an 10GBase-T standard is to transmit data at 10Gbps rate on four 100m twisted pair in the long run. We are mainly aimed at “CAT6-55m channel” to present the evaluation and design, and will achieve 10Gbps transmission under 100m copper wire in the future.

並列關鍵字

10GBase-T Ethernet 10G Ethernet

參考文獻


[5] G. Ungerboeck and S. Powell, “10GBASE-T cable characteristics, front-end solutions, and precoders,”IEEE P802.3an TaskForce, March 2005.
[11] J. G. Proakis and M. Salehi, Communication systems engineering, second Edition. Prentice-Hall, 2002.
[12] R. F. H. Fiscber, Precoding and Signal Shaping for Digital Transmission. Wiley-Interscience, 2002.
[13] M. Tomlinson,“New automatic equaliser employing modulo arithmetic,”Electronics Letters, vol. 7, pp. 138–139, 1971.
[16] Broadcom,“Design considerations for gigabit ethernet 1000Base-T twisted pair transceivers,”in Proc. of IEEE on Custom Integrated Circuits Conf., 1998, pp. 335–342.

延伸閱讀