可動懸浮結構為許多微機電元件的核心設計,達成元件致動或感測等重要任務。製程上常以蝕刻犧牲層完成結構釋放,對於大面積結構元件則需設計大量蝕刻孔,以協助蝕刻進行。然而,結構蝕刻孔設計,將會造成許多元件物理特性的改變;就平行板電容式微元件而言,蝕刻孔本身造成平行板電容的下降,周圍卻又會有雜散電場,衍生邊緣電容效應,造成電容估算的困難,致使元件特性難以掌握。對於具蝕刻孔電容式微機電元件,如何去評估、計算蝕刻孔效應,即成為重要的議題。因此,本研究針對具蝕刻孔平行板電容結構,解析其邊緣電容效應,並以商用數值模擬軟體ANSYS進行不同尺寸具蝕刻孔結構的數值模擬,接著取出適當的參數對模擬值作曲線擬合,提出蝕刻孔效應電容補償項經驗公式,在其適用範圍內,經驗公式值與模擬值相比,誤差在5%以內。為驗證經驗公式準確度,本研究同時以機械加工與微機電製程,進行大尺度模型實驗與微結構模型實驗。大尺度模型實驗直接驗證經驗公式準確度,經驗公式計算值與實驗值相比,誤差在5%以內;微結構模型實驗則為經驗公式的應用實例,配合文獻中的二維邊緣電容經驗公式,經驗公式計算值與具蝕刻孔微結構電容實驗值相比,總平均誤差為3.55%,而最大誤差量在8%內。本研究提出了針對蝕刻孔效應的電容補償項經驗公式,形式簡單、易於使用、適用範圍廣且準確度良好,配合現有結構電容計算文獻,能有效的提供微機電元件設計者快速估算具蝕刻孔平行板結構電容,掌握元件特性。
In many MEMS devices, movable suspension structure is the most important design to achieve sensing or actuating function. Etching the sacrificial layer under the microstructure is a common method to release structure. For the device which has large area, it is necessary to design a large number of etching holes to enable the etchant to etch sacrificial layer completely. However, the etching holes will result in many physical characteristics changes. For capacitive micro-devices, etching holes cause the decreasing of capacitance and induce fringe capacitance, which generated by fringe field, at the same time. As a result, estimating the capacitance of microstructures becomes much more difficult, so do the device characteristics. Therefore, how to calculate and estimate the etching holes effects becomes a very critical issue for the micro-devices with etching holes. This research aims at evaluating the fringe field capacitance caused by etching holes on microstructures, and developing empirical formulas. The general capacitance compensation term empirical formula for the fringe capacitance of etching holes is based on ANSYS simulation. By choosing appropriate parameters to curve fit on the results obtained from the simulation, the relative deviation of the empirical formula is within 5% compared with the ANSYS simulation results. To verify the empirical formula accuracy, large-scale experiment is performed in this research, and the relative deviation between the formula and experiment results is also within 5%. At the same time, the application to determine the capacitance of an electrostatic micro-beam with etching holes is demonstrated in micro-structure experiment, which agrees very well with the experimental data, and the maximum deviation is within 8%. In conclusion, this paper provides an empirical formula which can estimate the etching holes effects on capacitive micro-device. The present solution is with simple form, wide application range, high accuracy and easy to use. It is expected to provide the MEMS designers to estimate the capacitance of micro-devices with etching holes and predominate in the device characteristics.
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