H.264解碼器上使用輸出緩衝區與動態頻率調整之省電設計

A Low Power Design for a H.264 Decoder based on Dynamic Frequency Scaling using Output Buffers

鄭永森(Yung-Shen Cheng)

指導教授 ： 梁文耀

國立臺北科技大學/電資學院/電資碩士在職專班研究所/碩士(2012年)

摘要

多媒體應用的省電設計變得更加重要，因為它們在許多嵌入式系統中愈來愈多被使用。在行動多媒體系統中電池壽命成為相當關鍵的因素。由於H.264影片對於效能需求的變動性，我們可以充分地利用閒置的解碼時間以得到節能。在這篇論文中，我們將介紹一針對H.264影像解碼的簡易動態頻率調整機制，透過輸出緩衝區使處理器的所有閒置時間都能夠得到充分地利用。我們的控制機制會觀察輸出緩衝區被佔用多少，並相應地調整系統的頻率。而視框的解碼時間以視框的資料量及類型來加以預測。其特點是調整緩衝區容量最小化來得到最大的節能，且保證滿足即時限制和服務品質。實驗結果顯示這個機制可以大量減少在影像解碼的能源消耗。

關鍵字

H.264影像解碼 ； 動態頻率調整 ； 節能

並列摘要

Power-efficient design of multimedia applications becomes more important as they are increasingly used in many embedded systems. Battery lifetime become a critical factor in mobile multimedia systems. Due to the variability of the H.264 data streams, we can achieve energy saving by fully utilizing the idle time left in the decoding process. In this thesis, we introduce a simple dynamic frequency scaling mechanism for H.264 video decoding, allowing all idle intervals of the processor to be fully exploited with output buffers. The mechanism allows the system to adjust the system frequency according to the number of output buffers which are available. The decoding time of the frame is predicted by the size and the type of the frame. Our goal is to minimize the buffer size which could maximize the saved energy, with guaranteed real-time constraints and quality of service. Experimental results show that the proposed mechanism is able to achieve more energy reduction for video decoding.

並列關鍵字

H.264 video decoding ； dynamic frequency scaling ； energy saving

參考文獻

[27]蔡明諺，“基於動態預測模型之手持式串流播放裝置省電設計”，碩士論文，台北科技大學資訊工程研究所，台北，2011。

[2] K. Choi, K. Dantu, W. Cheng and M. Pedram, “Frame-based dynamic voltage scaling for a MPEG decoder,” ICCAD’02 – A give the CM/IEEE Int’l Conf. on Computer Aided Design, 2002, pp. 732-737.

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