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  • 學位論文

整合微機電元件與微控制器的封裝技術

Novel Package technology for Integrating MEMS devices and MCU

指導教授 : 黃榮堂 林震
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摘要


隨著電子IC產業的迅速發展,輕薄短小的要求越來越嚴苛,更便宜的產品已是大家所追求的目標之一,而覆晶封裝已被廣泛應用於為電子的產品上。為了獲得可靠的覆晶封裝連結性與包覆性,充分維持晶圓或晶粒上電鍍後的共面度與完整度是非常重要。使用CMOS-MEMS製程製作感測器並與封裝結合,CMOS-MEMS製程可以達到微小化、低成本及大量生產之優點,同時也易於與一般IC電路相容整合,形成微機電系統。 本論文提出一概念,使微機電感測器與一般微控制器可整合封裝,並設計新的製程方法可使相同的封裝方式應用在各種不同結構的感測器上,且可與CMOS電路整合形成智慧型感測器。設計一封裝環形成空腔保護並容許微機電感測結構在其中作動,不受外界雜訊干擾,透過銅導柱將訊號與微控制器連結,使感測後的訊號立即被轉換成有用的訊號。

並列摘要


With the rapid development of electronic IC industry, the slim and light requirements of increasingly demanding cheaper products is one of the goals we pursued, and flip-chip package has been widely used in electronic products. In order to obtain reliable package link and coated, and fully maintain the wafer or die coplanarity after electroplating and integrity is very important. CMOS-MEMS process to fabricate sensors and packaging combination of CMOS-MEMS process can achieve miniaturization, low cost and the advantages of mass production, but also easy to combine with the general integrated circuits. This paper presents a concept of MEMS sensors and microcontroller unit(MCU) can be integrated package, and design the new process lets the same package used in a variety of different structures on the sensor, and can be integrated with CMOS circuits to be a smart sensor. We designed a package ring to form a cavity protection and allow the MEMS structure measurement in which to sense without outside noise interference, the signal will be linked the MCU through the copper pillar, so that the sensing signal is immediately converted into useful signal.

參考文獻


[24] 許后竣,為電鑄與研磨技術在高單價為結構上的應用,碩士論文,國立臺北科技大學自動化科技研究所,2004年。
[23] 趙本善,一種使用研磨技術快速製作均勻無鉛覆晶凸塊,碩士論文,國立臺北科技大學製造科技研究所,2003年。
[40] Y. H. Li, C. F. Ding, H. P. Mao, Y. H. Zhang, “The Development of Microelectroforming Process of LIGA/Quasi-LIGA Technology”, Electronics Process Technology, Vol. 26, No. 1, pp. 1-5, 2005.
[1] C. S. Chang, A. Oscilowski, and R. C. Bracken, “Future Challenges in Electronics Packaging”, Circuits & Devices, pp.45~54, 1998.
[13] P. A. Totta and R. P. Sopher, “SLT Device Metallurgy and its Monolithic Extension”, IBM J. Research Devel., pp.226~237, 1969.

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