P/E循環期間SONOS電性之探討

近年來，電荷捕陷式非揮發性記憶體元件的應用，已逐漸顯示其重要性，最主要是在單一元件中，可有多位元資料儲存的能力，因此有提高儲存密度的優勢。也因為電荷捕陷式非揮發性記憶體具有多位元儲存能力，故如何於多次之記憶體寫入(Program)與抹除(Erase)後，仍能控制所儲存之電荷，於所要之位置，是重要的可靠性議題。本研究所用的電荷捕陷式非揮發性記憶體元件為具有ONO閘極介電層結構之n型通道金氧半場效電晶體(簡稱SONOS)。研究的內容是，對SONOS記憶體進行多次的寫入與抹除，觀測氮化矽層中儲存電荷對記憶體電性的影響，並以電荷幫浦(Charge Pumping)實驗方法來進行分析。實驗的主要結果是，提出可由調整抹除電壓及時間，來改善SONOS元件的記憶視窗。本研究對於了解載子注入時的特性，極具參考價值，也有助於選擇寫入和抹除的最佳化條件，及有效的改善多次寫入/抹除後可靠度的退化。

關鍵字

SONOS記憶體；電荷幫浦方法；電荷分佈

並列摘要

Recently, the discrete charge trapping non-volatile memory (NVM) devices have received much attention because of, e.g. their potential multi-bit storage in a unit cell. Therefore, it has advantage to enhance storage density. But also due to multi-bit storage capability; the control of the lateral distribution of programmed charges in NVM is particularly important. In this work, the memory device is an nMOSFET with oxide-nitride-oxide (ONO) gate dielectric structure (SONOS). In the experiment, P/E cycling of these SONOS devices is used to investigate the shift of threshold voltages, and then the charge pumping method is employed to analyze the electrical influence of charges trapping in the nitride layer. The result of the experiment indicates that longer stress time and higher drain voltage in erase operation can improve the memory window of SONOS. Through this research, the carrier injection mechanism in SONOS is understood. This is extremely valuable and can help device designers in optimizing the program and erase conditions, which then improve the P/E cycling reliability.

並列關鍵字

SONOS memory ； charge pumping ； charge distribution

參考文獻

[1] Toshiba Corporation ULSI Research Center, “Technology Trend of Flash EEPROM : Can Flash-EEPROM overcome DRAM”, Symposium on VLSI Technology Digest of Technical Papers, 1992, pp.6-9.

[2] D. Kahng and S. M. Sze, “A floating gate and its application to memory devices”, Bell Syst. Tech. J., Vol. 46, 1967, pp. 1283.

[3] Wegener H. A. R. et al., “The variable threshold transistor, a newly electrically alterable nondestructive read-only storage device”, IEDM Tech. Dig., 1967.

[4] C. Y. Chang and S. M. Sze, “ULSI DEVICES”.

[5] D. Kahng and S. M. Sze, “A Floating Gate and Its Application to Memory Devices”, Bell Syst. Tech. J., Vol. 46, 1967, p. 1288.

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P/E循環期間SONOS電性之探討

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