反及閘快閃記憶體之壓縮與管理模式

The Compression and Management Model for NAND Type Flash Memory

陳彥勝(Yen-Sheng Chen)

指導教授 ： 黃文增

國立臺北科技大學/機電學院/電腦與通訊研究所/碩士(2005年)

https://doi.org/10.6841/NTUT.2005.00346

摘要

在嵌入式系統中，儲存裝置必須具有體積小、容量大、低電源消耗、重量輕、非揮發性及耐震等特性，而反及閘快閃記憶體即為目前最常用的儲存裝置之一。但由於記憶體容量有限且昂貴，就單位記憶體而言，比傳統式硬碟來的昂貴數十倍甚至百倍；因此，如何增加反及閘快閃記憶體儲存空間，是一項探討的議題。本論文中，我們將使用改良式的快閃壓縮層配合X-RL的硬體壓縮演算法來避免壓縮所產生的額外負擔及降低被壓縮資料頁內部破碎程度，以提高壓縮率；而在讀取方面，由於我們採用一種連續的記憶體配置方式，可以降低因不連續配置的冗長讀取時間，使得我們的架構在嵌入式系統中更具實用價值。
除了壓縮之外，如何有效的管理快閃記憶體，也是一個重要的議題，因為快閃記憶體有兩項缺點，就是無法在原地抹除與抹除次數限制，因此，我們在文中提出一個有效管理方法。此方法讓快閃記憶體區塊作均勻抹除和減少抹除的動作，使得快閃記憶體不但可以降低清潔成本而且能延長使用壽命。然而，快閃記憶單元的降低清潔成本與均勻抹除兩者是相互衝突的；如何兩全其美，是本論文探討的重點。首先，我們的方法是藉由動態的分析資料屬性，分離成冷資料與熱資料，並將其重寫於不同區塊屬性中，以達到降低無意義的搬移動作；更進一步，能降低成本及提高系統壽命。第二目標是採用一種動態的均勻抹除策略，來提昇可靠度；此方法最大效益是只需要花費少量的運算成本，便可達到延長快閃記憶體的壽命與使用上的高可靠度。

關鍵字

嵌入式計算系統 ； 反及閘快閃記憶體 ； 儲存系統 ； 檔案系統 ； 清潔策略 ； 動態均勻抹除 ； 快閃壓縮層 ； 壓縮演算法

並列摘要

Storage devices of embedded systems must have the characteristics of small size, great capacity, low-power consumption, lightweight, non-volatility, and vibration resistance. The NAND type flash memory, briefly denoted by NandFlash, is one of the more often-used storage devices. In terms of unit price, its cost is several dozen to hundred times than the traditional Hard-Disk (HD), since its storage space is limited. Therefore, to increase the storage space of NandFlash is great significance. In this thesis, we will use the improved compression layer for NandFlash coordinated with the X-RL algorithm, to avoid overhead and reduce the degree of internal fragmentation in the compressed data pages, and to increase the compression ratio. In the reading phase, we use the consecutive memory allocation method, which can reduce the superfluous time caused by non-consecutive access. Therefore, our architecture is meaningful and practical for embedded system applications.
In addition to compression skill, to manage the flash memory by an effective method is an important topic too, since this flash memory has two weaknesses. That is, it cannot update in the site and the erasure time in a flash is limited. Therefore, we propose an effectively management method in this thesis. Our method makes the cycle-leveling action in a balanced manner and reduces the writing action to the flash memory block. This not only enhances system performance, but also prolongs the service life in this flash memory. However, in a flash memory cell, there is a mutual conflict between reducing the clearance cost and doing the cycle-levelling action. First, we dynamically analyze the state of data attribution. According to this attribution, the data are divided into cold or hot data types and then rewritten as different blocks to reduce non-essential actions, thus decreasing costs and improving system performance. Then, we adopt a dynamic cycle-levelling strategy, which only needs a small cost to extend the life of the flash memory, thus promoting its usage.

並列關鍵字

Embedded computing system ； NAND flash memory ； storage system ； file system ； cleaning strategy ； dynamically cycle-leveling ； flash compression layer ； compression algorithm

參考文獻

[3] M. L. Chiang, C. H. Lee, and R. C. Chang, “Managing Flash Memory in Personal Communication Devices,” Proceedings of the 1997 International Symposium on Consumer Electronics (ISCE'97), Singapore, Dec. 1997, pp. 177-182.

[2] 鄭重志，黃文增，陳俊達，陳錦杏，「快閃記憶體檔案管理系統的設計與實作」， 台北科技大學學報，第三十六之二期，2003，第43-62頁。

[5] 黃文增，陳彥勝，陳俊達，鄭重志，「高可靠度和低成本的快閃記憶體管理方法之研究」，台北科技大學學報，第三十七之一期，2003，第61-75頁。

[6] 黃文增，陳俊達，鄭重志，郭榮洲，「快速且低價的快閃記憶體之方法研究與實作」，台北科技大學學報，第三十七之一期, 2004，第77-89頁。

[25] W. T. Huang, C. T. Chen, Y. S. Chen and C. H. Chen, “A Compression Layer for NAND Type Flash Memory Systems,” The 3rd International Conference on Information Technology and Applications (ICITA’2005), Sydney, July, 2005, Accept.