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  • 學位論文

以多語意編碼之交錯運行長度測試資料壓縮法

Test Data Compression Based on Multi-Meaning Codeword For Alternating Run-Length Codes

指導教授 : 曾王道

摘要


為了要節省測試資料和測試時間,壓縮測試資料是一個常見且有效率的方法。本論文是以Alternating Run-Length data compression method (交錯運行長度資料壓縮法)為架構,發展出新的壓縮方法以提升資料壓縮率。此壓縮方法主要是利用多一個位元表示的方法讓一組編碼(codeword)能有雙重的語意,讓相同的編碼來表示兩種不同長度的測試資料,進而達成資料壓縮率的提升。最後的實驗結果是以ISCAS’89學術電路測試資料進行測試,而實驗結果也得到提升。

並列摘要


Due to reduce the test data volumn , test data compression is a common and efficent method. This paper is based on Alternating Run-Length data compression method as the framework to develop a new data compression method to improve the compression ratio. The method take the Alternating Run-Length data compression advenntage to improve the test data compression ratio. And our proposed method just use some bits to represent another Run-Length codeword. In other words, our codeword have Multi-Meaning to encode. this method can achieve significant compression ratio. Experimental results for the large ISCAS’89 benchmark circuits have demonstrated the proposed approach can improve the test data compression ratio.

參考文獻


[12] Usha S.Mehta, Kankar S. Dasgupta, NiranjanM. Devashrayee,“ Run-Length-Based Test Data Compression Techniques: How Far from Entropy and Power Bounds?—A Survey,” 2010 VLSI Design, Jan.2010.
[1] A. Chandra and K. Chakrabarty, “Frequency-directed runlength (FDR) codes with application to system-on-a-chip test data compression,” in Proceedings of the 19th IEEE VLSI Test Symposium (VTS ’01), pp. 42–47, Marina Del Rey, Calif, USA, March 2001.
[2] A. Chandra and K. Chakrabarty, “Test data compression and test resource partitioning for system-on-a-chip using frequency-directed run-length (FDR) codes,” IEEE Transactions on Computers, vol. 52, no. 8, pp. 1076–1088, 2003.
[3] A. El-Maleh and R. Al-Abaji, “Extended frequency-directed run-length code with improved application to system-on-achip test data compression,” in Proceedings of the 8th IEEE International Conference on Electronic Circuits and Systems (ICECS ’02), vol. 2, pp. 449–452, Dubrovnik, Croatia, September 2002.
[4] A. Chandra and K. Chakrabarty, “Reduction of SOC test data volume, scan power and testing time using alternating runlength codes,” in Proceedings of the 39th Design Automation Conference (DAC ’02), pp. 673–678, New Orleans, La, USA, June 2002.

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